ad9176 clkin singal

Question

Hi 
 I noticed that the requirement of AD9176 input clkin+/- is 0-6dBm with 100 ohm termination. The usual LVDS output clock signal is 350mV or 700mVpp, is there any recommendation to provide this clock other than dedicated JESD Clock generators? 
 For the Eval board with HMC7044, is the output as high as 0dbm? 
 Thank you

emrecangidik · Accepted Answer

Hi m17 
 I am only supporting HMC7044. so, I don't have knowledge about AD9176. Output characteristics of HMC7044 are given as peak-to-peak voltage and common level voltage. Using dBm in clocking applications is not common as the slew rate of the signal is important and the signal is preferred to be squarewave. 
 I recommend checking the Vpp and Vcm voltage while interfacing AD9176 with any other devices. Vpp and Vcm values are given in the below table for various driver modes of HMC7044. 
 
 Thanks, 
 Emrecan)

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ad9176 clkin singal