Full-scale for AD9176 and AD9081

Hello,

For the 9176 assuming you have a 50ohm load resistance then at full scale current of 26mA you should have:

I_loadmax = 0.026A*(100/150)=0.0087A

I_loadrms = 0.0087A/sqrt(2)=0.00615A

Pload(W)=(0.00615A)^2*50ohms=1.9mW = appx 6dBm. This is just a general model and does not take into account any cabling effects or changes in the complex impedance of the dac output over frequency.

Hello,kberry

Whether I should understand it this way,

I_loadmax = Ioutfs/2*Rint/(Rint+Rload)=0.026A/2*(100/150)=0.0087A.

I_loadrms = 0.0087A/sqrt(2)=0.00615A.

Pload(W)=(0.00615A)^2*50ohms=1.9mW .

Pload(dBm)=10*log(1.9mw)=2.79dBm.

Hello, sorry for 2 typos above! Corrected here:

I_loadmax = Ioutfs*Rint/(Rint+Rload)= 0.026A*(100/150)=0.0173A

I_loadrms = 0.0173/sqrt(2)=0.0122A

Pload(W)=(0.0122)^2*50=7.5mW

Pload(dBm)=10*log(7.5mw)=8.76dBm

You can think about it like the positive and negative dac outputs have a maximum differential current of Ifs between them when at max code, and this current gets split between the internal 100ohm resistance and the 50ohm load resistance. So with a 1:1 balun you have 66% of Ifs across the load.

However the output impedance of the dac varies over frequency (closer to 100ohms at lower frequencies so a 2:1 balun is suggested, and closer to 50ohms as you exceed 2GHz so a 1:1 balun is suggested in that operating region) and is not purely resistive. There are lots of other factors affecting the actual power output (pcb design, balun S11, cabling loss, etc) so the best method to determine power output is measurement on your own setup or use of our s-parameters model in combination with your own PCB model and balun model for simulation.

Hello,kberry

I know what you're saying,According to zhe formula,I calculate that AD9176 0dBFS is 9.2dBm(Ioutfs is 26mA,Rload is 100Ω).

But,AD9081 and AD9176 have the same output equivalent circuit.

Datasheet for AD9081 indicates that when Ioutfs is 26mA,0dBFS is 3.3dBm.

Why is this.

Hi Lideya,

As noted in the footnote there the output power is highly dependent on frequency, pcb layout, cabling, balun, etc. So while the theoretical maximum power with none of these effects considered using an ideal equivalent circuit model could be 9dBm, the measured value is likely to be significantly less. The datasheet tests were run on a product evaluation board, which has a different layout than our eval boards, so already you can see a difference between this 3.3dBm value in the spec and the values in the below chart, which show the output power across frequency on the FMCB eval board (also at 26mA Ifs). The second graph shows the resistive component of the dac output impedance varying over frequency. I am not sure what output frequency was used for the DC dac specs table for the 3.3dBm measurement, and this will clearly affect the output power. There are also minor layout differences between each dac on the board.

Hello,Could you tell me which datasheet these two figures come from? The output resistance I obtained from simulation using the S2P file are not the same.