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Category: Software
Product Number: AD9136_FMC_EBZ
Software Version: ACE
Hi, thank you very much for your help! Now I can successfully read and write registers including ad9136 and ad9516 using verilog. 
But I ran into a new trouble. I'm confused about the Fin parameter in the Initial Configuration Summary interface in ACE software, I don't know what input it refers to?
I already know that RefClk corresponds to the input CLK of the PLL, and FDAC is the final target output frequency of the DAC. This bothers me a lot.
The ad9516 should output two kinds of clocks to the ad9136, one is input to the phase-locked loop, and the other is SYSRef, but it seems that SYSREF is not needed here.
I want to export register list in ACE software, how should I set these parameters to get the correct register list?
  • Now I use an RS SMB100A signal generator to solve the problem. Output 250M sine wave of 3dbm, which solves the problem. The reason why I didn't see the waveform before is that the bandwidth of the oscilloscope is limited. I switched to a spectrum analyzer and saw the frequency domain information correctly. The problem now is that I get the register list according to the evaluation software setting of ad9516-1, use the clock distribution mode, configure the registers correctly but do not get the desired output signal, what is the possible reason? I confirmed that all the registers I have exported are the registers I entered, except the one whose address is 0x002 reads 0x040, and I set it to 0x010, but its description is reserved, what is the meaning of this? Can you help me? 

  • Hi  ,

    Please confirm if I understand your question correctly - you are having problems on the AD9516 clock buffer?
    If yes, might be good to post a question in Clock and Timing 



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