Due to the design needs, I need the AD9171 to output pulse signals at non-equal intervals, but after testing, I found that the initial phase of the pulses output by the AD9171 is not the same when ad9171 input baseband is same.
Since the output signal is obtained after mixing inside the AD9171 I guess the NCO is causing the problem.
According to the datasheet, I think I can reset the NCO by sending a sysref signal after the 204B subclass1 link is established to ensure that the initial phase of each pulse output from the AD9171 is the same. But the datasheet does not explain NCO reset in detail.
So I have the following questions：
1.After the AD9171 receives the sysref signal to reset the NCO, how long does it take for the NCO to operate properly?
2.To get the deterministic phase, can I use the FPGA to generate sysref signals to provide to the AD9171 and ADI 204B IP?
Any answer would be helpful, thanks.