I don't quite understand the difference between AD9136 and AD9144. They all mark rates up to 2.8GSPS. But they are two channels and four channels respectively. Shouldn't it be a 2x relationship? Is there any connection with JESD204B?
And I had a lot of trouble configuring the ad9136 using FPGA. I want to use the xilinx jesd204bIP core. Most of your examples involve microblaze working with ADI's jead204b to generate a blockdesign, which usually also requires software(C language) support to modify the DAC register. Since the board is digilent's genesys2(an unsupported board), the modification project needs to be very familiar with the tcl script. It takes a lot of time for me. I only want to use the FSM to configure the registers through the Verilog implementation. This needs SPI protocol to write, have reference data? I am also terrified of JESD204B. I have been familiar with the data of clock chips AD9516 and AD9136 on DAC board, and have roughly known the whole process. I have difficulties in parameter setting and verilog code writing. Overall, I currently regret buying this board without fully understanding JESD204B. I underestimated its difficulty and wasted a lot of my time.
Any suggestions would be appreciated!
