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AD9142A NCO Mode Startup Sequence using External DAC Clock

Category: Software
Product Number: AD9142A

I am trying to configure the AD9142A DAC using SPI interface.

I have derived the configuration sequence for NCO mode from the Startup routine from the data sheet, yet I am not able to get any output.

Procedure Followed:

1. Provided stable DAC clock.

2. Provided DAC clock/2 as DCI clock (Interpolation Factor - 2, Word Mode)

3. Fed stable data (all 1's) on the LVDS interface.

SPI Register sequence:

TRANS ADDR DATA

WRITE 0x01 -> 0xC0",
WRITE 0x20 -> 0x01",
WRITE 0x00 -> 0x20", -- RESET DEVICE
WRITE 0x20 -> 0x01", -- IRQ CONFIG
WRITE 0x5E -> 0xFE", -- DLL ENABLE/DISABLE
WRITE 0x0A -> 0xC0", -- DLL ENABLE/DISABLE
READ 0x0E -> 0x00", -- NOT REQ IF DLL IS DISABLED (DLL STATUS)
WRITE 0x28 -> 0x00", -- INTERPOLATION x2
WRITE 0x25 -> 0x01", -- FIFO RESET
READ 0x25 -> 0x00", -- read transaction FIFO RESET STATUS
READ 0x24 -> 0x00", -- read transaction FIFO STATUS
WRITE 0x27 -> 0x40", -- ENABLE NCO
WRITE 0x31 -> 0x4C", --& FTW_0_REG, -- NCO FTW0 FOR 143 MHz
WRITE 0x32 -> 0xB9", --& FTW_1_REG, -- NCO FTW1
WRITE 0x33 -> 0x94", --& FTW_2_REG, -- NCO FTW2
WRITE 0x34 -> 0x2B", --& FTW_3_REG, -- NCO FTW3
WRITE 0x30 -> 0x01", -- NCO UPDATE REQ
READ 0x30 -> 0x00", -- read transaction
WRITE 0x27 -> 0xC0", -- INVERSE SINC FILTER ENABLE
WRITE 0x01 -> 0x00" -- POWER UP DAC OUTPUTS

Please check the same and let me know if any mistake is done in the sequence.

This sequence is derived from the startup sequence-1 (Page no: 47) from AD9142A datasheet 



Grammer mistake
[edited by: Pradeep0415 at 5:47 AM (GMT -4) on 14 Jun 2022]

Top Replies

  • Hello  

    Thank you for your interest in AD9142A. Are you using AD9142A-M5372-EBZ with SDP-H1 or ADS7-V2? How are you measuring the output? Since your input are all 1's, If you are using a Balun…

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  • Hello  

    Thank you for your interest in AD9142A. Are you using AD9142A-M5372-EBZ with SDP-H1 or ADS7-V2? How are you measuring the output? Since your input are all 1's, If you are using a Balun /transformer, ensure that it can support frequency from 0Hz.


    You can try the sequence below which is generated by using ACE & Macro tool. you can also write to 0x1 as the last step.

    Initial Startup
    Write 0x26, 0x0 (Set Data format)
    Write 0xA, 0x40 (Duty Correction Enable. If DLL is enabled, write 0xC0)
    Write 0x5E, 0x0FE (Turn off LSB delay cell)
    Write 0x5F, 0x67
    Write 0x28, 0x0 (Interpolation)
    Write 0x25, 0x1 (Reset FIFO)
    Read 0x25
    Write 0x1, 0x0 (Powerup I & QDAC)

    Configure NCO settings
    Write 0x27, 0xC0 (Enable NCO)
    Write 0x31, 0x4C (Configure NCO)
    Write 0x32, 0x0B9 (Configure NCO)
    Write 0x33, 0x94 (Configure NCO)
    Write 0x34, 0x2B (Configure NCO)
    Write 0x30, 0x0 (NCO SPI update Request)
    Write 0x30, 0x1
    Write 0x5E, 0x0FE (Turn off LSB delay cell)
    Write 0x5F, 0x67

    Thanks,
    Lorenz

  • Hello Lorenz,

    I am testing the AD9142A in our custom board in which the DAC was proven already by transmitting the waveform coefficients over LVDS interface. Now, we are trying to test the DAC using NCO mode.

    For NCO mode, in the data sheet it was mentioned that stable data should be fed, but the data value to be fed was not mentioned. I need a CW signal of 70 MHz from NCO. What should be the value to be fed to the LVDS interface.

    Update : Got it working with the sequence.

    Thanks,

    Best Regards,

    Pradeep S

Reply
  • Hello Lorenz,

    I am testing the AD9142A in our custom board in which the DAC was proven already by transmitting the waveform coefficients over LVDS interface. Now, we are trying to test the DAC using NCO mode.

    For NCO mode, in the data sheet it was mentioned that stable data should be fed, but the data value to be fed was not mentioned. I need a CW signal of 70 MHz from NCO. What should be the value to be fed to the LVDS interface.

    Update : Got it working with the sequence.

    Thanks,

    Best Regards,

    Pradeep S

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