I am trying to configure the AD9142A DAC using SPI interface.
I have derived the configuration sequence for NCO mode from the Startup routine from the data sheet, yet I am not able to get any output.
Procedure Followed:
1. Provided stable DAC clock.
2. Provided DAC clock/2 as DCI clock (Interpolation Factor - 2, Word Mode)
3. Fed stable data (all 1's) on the LVDS interface.
SPI Register sequence:
TRANS ADDR DATA
WRITE 0x01 -> 0xC0",
WRITE 0x20 -> 0x01",
WRITE 0x00 -> 0x20", -- RESET DEVICE
WRITE 0x20 -> 0x01", -- IRQ CONFIG
WRITE 0x5E -> 0xFE", -- DLL ENABLE/DISABLE
WRITE 0x0A -> 0xC0", -- DLL ENABLE/DISABLE
READ 0x0E -> 0x00", -- NOT REQ IF DLL IS DISABLED (DLL STATUS)
WRITE 0x28 -> 0x00", -- INTERPOLATION x2
WRITE 0x25 -> 0x01", -- FIFO RESET
READ 0x25 -> 0x00", -- read transaction FIFO RESET STATUS
READ 0x24 -> 0x00", -- read transaction FIFO STATUS
WRITE 0x27 -> 0x40", -- ENABLE NCO
WRITE 0x31 -> 0x4C", --& FTW_0_REG, -- NCO FTW0 FOR 143 MHz
WRITE 0x32 -> 0xB9", --& FTW_1_REG, -- NCO FTW1
WRITE 0x33 -> 0x94", --& FTW_2_REG, -- NCO FTW2
WRITE 0x34 -> 0x2B", --& FTW_3_REG, -- NCO FTW3
WRITE 0x30 -> 0x01", -- NCO UPDATE REQ
READ 0x30 -> 0x00", -- read transaction
WRITE 0x27 -> 0xC0", -- INVERSE SINC FILTER ENABLE
WRITE 0x01 -> 0x00" -- POWER UP DAC OUTPUTS
Please check the same and let me know if any mistake is done in the sequence.
This sequence is derived from the startup sequence-1 (Page no: 47) from AD9142A datasheet
Grammer mistake
[edited by: Pradeep0415 at 5:47 AM (GMT -4) on 14 Jun 2022]