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AD9174 Wideband mode

Hi,

We have been using the AD9172 for a while now in wideband mode where the signal is a complex signal with I map to DAC0 and Q to DAC1. The mode used is JESD mode 10 with x1 interpolation in both channel and main data path. The channel data rate is 3000MSPS and the DAC sampling it 3Gsps.

In order to reduce complexity of the anti-aliasing filter after the DAC, we decided to upgrade to the AD9174 which in wideband mode 10 allows to interpolate by x2 or x4 in the main data path. However this configuration does not seem to work, only 1 DAC output seems to be active when setting the main data path interpolation of the AD9174.

We are using the Linux kernel driver to configure the device.

I see that when the main data path interpolation is set to x4, the NCO becomes enable in the datapath which seems to be a requirement of register 0x112. I fear we have misread the datasheet and usage of the main data path interpolation in wideband mode. Could someone confirm whether what we are trying to achieve is possible ?

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  • Looking at switch configuration, i feel i should be able to use the AD9174 in the mode I am looking for using the switch configuration 3B with an NCO set to 0. I tried setting the following registers value but without any sucess:

    DAC0 reg 0x112 :   0x78
    DAC1 reg 0x112 :   0x70

    reg 0x0ff :   0x02

  • can you see the output on DAC0? only DAC1 has no output?

    make sure to use the reg 0x90 to turn on the DAC1. 

  • Hi,

    We are using your Linux driver so in general we don't expect to modify registers directly unless you confirm that this configuration is not supported and needs some manual register updates.

    The value returned by register 0x90 is 0x0 so both DAC are indeed power up.

    With the AD9172 we have the following working device tree:

        dac0_ad9172: ad9172@1 {
            #address-cells = <1>;
            #size-cells = <0>;
            compatible = "adi,ad9172";
            reg = <1>;
            spi-max-frequency = <1000000>;
            clocks = <&hmc7044 2>, <&hmc7044 3>;
            clock-names = "dac_clk", "dac_sysref";

            adi,dac-rate-khz = <3000000>;
            adi,jesd-link-mode = <10>;

            adi,jesd-subclass = <0>;
            adi,dac-interpolation = <1>;
            adi,channel-interpolation = <1>;
            adi,clock-output-divider = <4>;
            adi,syncoutb-signal-type-lvds-enable;
        };

    With the AD9174, we try interpolation by 2 and 4. For interpolation by 2 we are using:

        dac0_ad9172: ad9172@1 {
            #address-cells = <1>;
            #size-cells = <0>;
            compatible = "adi,ad9172";
            reg = <1>;
            spi-max-frequency = <1000000>;
            clocks = <&hmc7044 2>, <&hmc7044 3>;
            clock-names = "dac_clk", "dac_sysref";

            adi,dac-rate-khz = <6000000>;
            adi,jesd-link-mode = <10>;

            adi,jesd-subclass = <0>;
            adi,dac-interpolation = <2>;
            adi,channel-interpolation = <1>;
            adi,clock-output-divider = <4>;
            adi,syncoutb-signal-type-lvds-enable;
        };

  •  , can you take a look at this issue when using the Linux driver?

  • Hi chrisWN, 

    While waiting for a response from the Linux driver dev team, could you please toggle the both bit 0 and bit 1   had suggested, to confirm that both DAC0 and DAC1 are functional.

    Another option is configure the device into a dual-link mode, which would power ON both datapath0 and datapath1, to configure NCO0 and NCO1. You should be able to see outputs on both DACs in this case.

    Both are debug steps - we will need feedback from  and the Linux dev team in terms of what the drivers support. 

    FYI:

    "Users can access the internal registers of devices from userspace through the IIO infrastructure using the iio_reg command from the Linux command line. Or from the Debug tab of the IIO Osciloscope, see an example from a different project but AD9174 should be similar."

     

    Landsman

  • another option, is to debug this issue using ACE -- you can use NCO-only mode without an FPGA dev kit. Please see in the AD9172-FMC-EVB user guide on our Wiki. This will eliminate the possibility that there is a hardware-related issue with the board or in the setup. 

    Landsman

  • Hi,

    The only thing that is missing is the write to 0x596 with value 0xC for DAC1.

    With this, the data path configuration works as expected.

    iio_reg -u ip:10.44.3.72 axi-ad9172-hpc 0x8 0x40
    iio_reg -u ip:10.44.3.72 axi-ad9172-hpc 0x112 0x78
    iio_reg -u ip:10.44.3.72 axi-ad9172-hpc 0x8 0x80
    iio_reg -u ip:10.44.3.72 axi-ad9172-hpc 0x112 0x70
    iio_reg -u ip:10.44.3.72 axi-ad9172-hpc 0x8 0xC0
    iio_reg -u ip:10.44.3.72 axi-ad9172-hpc 0xff 0x2
    iio_reg -u ip:10.44.3.72 axi-ad9172-hpc 0x596 0x0C

    I'll update the driver to support all Modulator Switch Configurations.

    -Michael

  • Hi Michael,

    Thanks for your fix. i tried the same sequence on our custom design and I believe it is working also for me. This is great, thanks!

    Christophe

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