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High-Speed DACs

Q&A AD9163 DLL can't lock

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AD9163 DLL can't lock

TNC-FPGA 10 months ago

I am using AD9163. The dac clock is 400Mhz. I used an oscilloscope to observe the 400MHz dac clock is right.

But the context of REG 0x092 bit0=0, which means DLL is not locked.

What can I do next to figure out this issue?

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0 deljones 10 months ago

Hello,

Are you using the AD9163 evaluation board with ADS7 evaluation platform or something else?

Del
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0 TNC-FPGA 10 months ago in reply to deljones

No, I debugged the board designed by myself . The dac clock and sysref are generated by the LMX2594 chips. I follow the DAC Start-up Sequence in AD9163 datasheet(Rev.D). And I try 200M,400M,800M,1.2G as DAC clock. But no one can make the DLL lock.
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0 deljones 10 months ago in reply to TNC-FPGA

The DLL lock bit is "sticky". I would recommend clearing it by writing 0 to that register and then reading it back to see if it sets to 1 again or stays at 0.
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