Questions about debugging methods of AD9173

Hello,

Above questions are related with issues on testing with customer's board with multi-AD9173s.

So if possible, they want to get your advices ASAP.

Would you confirm above questions and let me know your any opinions ASAP?

Regards,

Se-woong

Hi Se-woong, 

There is no way to configure the part without SPI. The user would need a reliable SPI communication to the device.

Are all AD9173 devices sitting on the same SPI bus on the board (same MISO MOSI SCLK lines, different /CS lines)?

I would suggest to:

1. Check that supplies settle to the correct levels during board power-up and do not violate the AMVR setting from the datasheet during supply bring-up. 

2. Make sure to soft-reset the part before programming, after the supplies had settled.  reg 0x0

3. make sure 4-wire or 3-wire SPI is configured correctly. reg 0x0  

4. Check the skew on the SPI lines and whether there are any timing violations relative to SCLK, at each AD9173

5. Check for soldering issues.

Additional questions: 

6. if there are four AD9173 per board, and multiple boards are failing, is the same AD9173 device always failing? for example device #2, etc.

7. Were the boards functional before, or did the customer recently got them back from assembly?

Please let me know. 

Thanks,

Landsman

Dear Landsman,

Thank you for your Kind reply.

As your answers and questions, they send additional questions and their answers,

Please refer their answers and questions.

1. SPI configuration of AD9173 : Connected each FPGAs thru Buffers

  --> When SPI isn't operated, they check normal wave forms at pins of AD9173 ( Buffer at AD9173 side).

 2. Answers about your suggestions.

     2-1) After completing the Power supply, transmit SPI data.

           --> Abnormal case:

                  Not operated SPI even though sending SPI data  waiting 1 ~2 sec after completing Power On.

           -->  Check thru reading register values (SPI read register)

     2-2) Operate after Soft reset using power sequence provided form Datasheet (device)

     2-3) Configuration is changed from 3 wire to 4 wire configuration.

     2-4) Checked SPI control signals are normal. DAC SPI clock is operated  about 100KHz.

     2-5) About soldering, they already done  a re-touch procedure except BGA ICs.

     2-6) Issue is occurred at same device on same board.

        --> Only 3 ea DAC among total 64ea seem to be failure.  (Operation failure when Power ON/OFF)

        --> One board has  4ea AD9173 and locations of failure DAC are different per each board.

    2-7) 16ea PBA are assembled at the same time.

3. Additional questions and status.

   3-1) Would you let them know the exact meaning of AMVR setting?

   3-2) If DAC isn't operated, even though  doing SPI configuration command again, DAC isn;t operated.

        In above case, after turning off and then turning on the power,  configured by SPI configuration command.

        A frequency of occurrence (Not operating Case) is random. (It seems to be occurred 1 times among 10 times Power On/Off.)

    3-3) When DAC isn't operated, they try to control this failure using Hardware Reset( E8).

          But It isn't approved.

Please refer above Q&As and let me know your advices.

Regards,

Se-woong

Hi Se-woong,

Se-woong said:

About soldering, they already done  a re-touch procedure except BGA ICs.

They should add flux to the PCB and allow all the solder to reflow, in case of cold solder joints in the BGA. 

AMVR = absolute maximum voltage ratings, Table 10 in the datasheet. 

AD9173 (Rev. B) (analog.com)

Could you please help get answers for my earlier three questions, in bold and also #6 and #7 in the post above. Also please confirm for #1 that the customer confirmed all the supplies are within device spec per AMVR. 

Landsman

Dear Landsman,

Please refer below answers from my customer.

1. Are all AD9173 devices sitting on the same SPI bus on the board (same MISO MOSI SCLK lines, different /CS lines)?

   <My customer>

   Each AD9173 is connected  to FPGA independently. 

   In means that. they use different MISO,MOSI,SCLK and /CS lines.

6.

  < My customer>

   -->  Issue is occurred at Issued AD9173.

  -->  Issued AD9173s are 3 ea and  AD9173's locations on boards are different.

  -->  Boards with issued AD9173s are different.  

       ( For example, if issues are occurred at second AD9173 on third board, first AD9173 on fifth board and forth AD9173 on first board, issues are occurred same  AD9173s. )

7.

<My customer> 

All 64 channels and assembled with same LOT.

1. 

< My customer>

 They say that they don't violate the AMWR and power of AD9173 is supplied by LDO device. 

• DAVDD10 : ADP1763ACPZ
• AVDD10 : ADP1763ACPZ
• AVDD18 : ADM7154ACPZ-1.8

Please refer above answers from my customer.

Regards,

Se-woong

Dear Lansman,

Would you let me know your more opinions and advices about  their questions and requests?

They still wait your help.

Regards,

Se-woong

Hi Se-woong, 

Regarding the LDOs, an LDO does not guarantee that during start-up there are no transients (peak excursions) that would violate AMVR leading to device damage. The only way to know is to check with a scope, while the part is starting up. 

From everything you describe, I suspect the issue is either damage to device during assembly, poor BGA soldering, or damage to device in the end-system during testing. Nothing in the AD9173 would account for this issue with SPI communication. We never heard of reliability issues with the device since its release. 

Landsman 

Dear Landsman,

My customer ask additional questions related their status.

1. About LDO, they check the wave form of LDO  and confirmed no issue in LDO output.

   Please refer attached file.

 PPTX

2. Additional questions

  2-1. Question about fault phenomenon

        - Issue ( No output at DACOUT /  No ack on SPI )

       1). Repetition rate

             Issue is randomly occurred on Power ON/OFF test.

             Success case is more than fault case.

             Some times are operated normally and some times are occurred issue.

        2). Location

              Location of occurred device  among 64 ea AD9173s is fixed. 

               For example, if 3th device on 4th board has issue, issue is occurred at this device.

              Currently 3 device have these issues.

         3) Recovery

             If issue  is occurred one device, it doesn't recovery at Power ON status even though they try to do HW reset and SW reset and etc.

             After Power off and on again, some times is cleared issue and operated normal.

             But during Power ON/OFF test, issue may be occurred at this device again.

         Q1) Would you advise them other check points that they should do before device SWAP  test?

          Q2) About above status, would you suggest the reason why these issues are occurred?

          Q3)  Would you suggest other debugging methods that they can do except SWAP test?

         As you know, this device is too expensive, so they want to do more test before device SWAP test.

         Please share your experiences and suggest any opinions.

Regards,

Se-woong

Dear Landman,

Would you let me know your opinions about above questions?

I need your comment about above questions in my ex-reply ,because it has some clarification and additional comments about their phenomena with fault status.

Please review additional questions in my ex-reply, and let me know your opinions.

I need your help.

Regards,

Se-woong

Assumed answered offline.  Let us know if you need further assistance on this and we can re-open the case.

Assumed answered offline.  Let us know if you need further assistance on this and we can re-open the case.