I have an ad9174-ebz board connected to an ads8-v1 pattern generator for testing.
Using supplied software (DPGDownloader and ACE), I can use several JESD modes (e.g. those labelled 00, 01, 02) quite effectively
However I'm currently interested in testing the high instantaneous bandwidth modes, that aren't limited by the channelizer's max of 1.5GSPS. E.g. mode "10" (3SPS data rate, single DAC, 16-bit) and "22" (2SPS data rate, dual dac, 12-bit).
Below I've shown a screen shot of attempting to use the wizard to apply these settings to the ad9174, resulting in a pop-up "transaction error" message. After this, ACE requires a restart in order to change back to a working mode. On cicking "read SERDES status", the feedback is that the DAC PLL is not locked. I am hoping to use the on-chip PLL default reference (ie. nothing not included in the evaluation boards). Perhaps I'm being naive here.
The results attempting to use mode 22 are identical.
Hopefully I'm doing something obviously silly. I'm using the latest version of ACE: 1.22.3063