Issue to get clean output of AD9707

I try to use two parallel  AD9707 on a mixed signal FPGA board for signal generation @ about 5MHz. Whilst @ the ouputs of both AD9707 a strange behavior can be noticed.

AVDD = 1.8V
DVDD = 1.8V
Diff_CLK = 65MHz
FS_ADJ 6k4 to GND
OTCM to GND
Differential Buffered Output setting using an ADA4807-4
REFIO to AD8656 to ADA4807-4

See schematics:



Register settings
Mnemonic    Addr     Bit 7     Bit 6     Bit 5     Bit 4     Bit 3     Bit 2     Bit 1     Bit 0
SPI CTL        0x00     1          0           0          0           0           0           0          0          (default)
Data              0x02     0          -            -           0           0           1           -           0
Version         0x0D     -          -            -            -           1           1           0          1
CALMEM      0x0E     -           -           0           0           -           1            0         1
MEMRDWR 0x0F     0          0           -            -           0           0            -          0           (default)

The ILA curves of the FPGA are the same as what can be measured at the DAC data inputs. e.g.:


Timing of DAC inputs related to CLK seems to be ok:

 purple depicts differential CLK input @ AD9707, yellow depicts input of LSB @ AD9707



At the DAC output respectively after the differential buffered output the curves are a way of rippling in a periodic way of 1/32 of the (full-scale) period:

 sawtooth as full scale range input - depicted is differentially measured strange behaviour @ DAC output

 sinusoidal as full scale range input - depicted is differentially measured strange behaviour @ DAC output

 sawtooth only the 5 MSBs as input - depicted is differentially measured behaviour @ DAC output

 sawtooth as input _ only the 9 LSBs as input - depicted is differentially measured strange behaviour @ DAC output

What could I have missed? Can this be smoothed without calibration in the first step?

Your help is greatly appreciated :-)
regards Matthias

Top Replies

  • 0
    •  Analog Employees 
    •  Super User 
    on Feb 26, 2021 1:22 AM

    Hi,

    Moved this thread to the High-speed DACs community. 

    Regards,
    Ian

  • 0
    •  Analog Employees 
    on Mar 1, 2021 2:45 AM

    Hi Matthias,

    I am assuming you used the differential buffer configuration in Figure 90 of the AD9707 datasheet?

    I would like to recommend simulating the op amp configuration by using signal sources in place of the DAC outputs. Then compare the simulation results to the waveforms you are observing now.

    The op amp configurations in the datasheet need to updated.

    Best,
    Shine

  • Hi Shine,

    thank you for responding. :-)

    used the differential buffer configuration in Figure 90 of the AD9707 datasheet

    yes, used as a basis, I added R_B = R_S and changed the op amps (parts are seen in the schematics)

    The op amp configurations in the datasheet need to updated.

    Is there further need for improvement? Would you please explain your thoughts?

    simulating the op amp configuration by using signal sources

    results where linear, as expected.



    I can measure the above desribed behavior on the one hand after the differential buffer and on the other hand also directly at IOUTA, IOUTB of the AD9707.

    Measurement of REFIO is constant around 1V.

    When using only the 5 MSBs the whole circuit acts as expected.
    It seems to me as if using more bits as active input would introduce the issue I can't explain.

    Regards,

    Matthias

  • +1
    •  Analog Employees 
    on Mar 9, 2021 2:25 PM in reply to kuehnlms

    Hi Matthias,

    Sorry for the delay in getting back to you.

    The op amp configurations in the datasheet need to updated.

    Is there further need for improvement? Would you please explain your thoughts?

    Most questions on the family of this device is about the op amp circuits not working. So we are planning to update the datasheet by replacing the op amp circuits.

    The proper way of converting differential current to differential voltage is in figure 7 of this application note. For AD9707, proper load resistor values are described in page 35 of the datasheet. See screenshot below:


    The values of the resistors in series with the DAC output voltages and the op amp feedback resistors is dependent on the desired gain.

    Regards,
    Shine