AD9176 - register 0x111 - can I switch channelizer (complex) to raw DAC (real-only) on the fly?


We are successfully working with an AD9176 in JESD mode 11, with main datapath interpolation set to 4, channelizer datapath interpolation set to 1, using the NCOs to mix an input frequency and output the upper sideband. This means that register 0x111 (interpolation setting) is set to value 0x41.

I would like to switch this on-the-fly to use raw data in real-only mode (dual-dac for now, so we do not have to switch JESD modes). After reading the datasheet for some time, it seems that this can be accomplished by setting register 0x111 to value 0x11 (which in table 13 seems to be permitted in JESD mode 11). So I do this, and my output waveform disappears. I am using a spectrum analyzer to view this waveform. It's like the DAC output has been completely disabled. Now, I set the register back to its previous value, 0x41. My output still appears to be completely disabled. So clearly more steps are needed to switch the interpolation and restart the data flow to the output of the DAC when changing interpolation values.

My question is: is there a simple way to do this (switch interpolation from (4,1) to (1,1) to bypass NCOs in JESD mode 11), or will it require something more complicated, like going through the entire register sequence as detailed in the "Start-Up Sequence" section of the datasheet?


  • +1
    •  Analog Employees 
    on Jan 8, 2021 4:26 PM 3 months ago

    Hi es419oh, 

    Switching interpolation on the fly isn't practical - the interp rate sets the intermediate clock rates on-chip. So changing interpolation would require also changing the JESD204B lanerate, LMFC rate, PCLK rate, and the clock domains across the interpolation stages. 

    Also, interp=1 implies the datapath is bypassed. It is a direct connection from the JESD204B to the DAC core. Not the same as interp>1.

    You could try to sample-repeat from the FPGA to mimic a change of interpolation (datarate). But the interp stages cannot be adjusted on the fly without resetting the link, resetting the SERDES PLL, etc. 


  • This is what I needed! We have other options to run raw data but weren't sure if we could do it this way, so this clears it up. Thanks!

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