Post Go back to editing

AD9173 TXEN issue

Hi, 

I have encountered an issue while using TXEN0/1 pins on AD9173. The SPI TXEN control is disabled for both DACs, however DAC1 output cannot be enabled using TXEN1 only, but both TXEN0 and 1 have to be set. This does not apply for DAC0.

In other words, DAC0 is normally controlled with TXEN0, while TXEN1 has effect on DAC1 only if TXEN0 is asserted. 

Is this expected behavior? 

Parents
  • Hi Dordije,

    Certainly not the intended behavior... but is a known issue on an earlier Silicon revision. The R4a silicon has this resolved: 

    AD9171/2/3 were released on R2 silicon

    AD9174/5/6 were released on R4a silicon

    A later PCN has up-rev'd the AD9171/2/3 to R4a (it is posted on the product page). But while there is still R2 material in distribution (to date), you may receive R2 material still. 

    As a workaround, if this TXEN behavior is a concern, please consider using the AD9175 for now. 

    Landsman

Reply
  • Hi Dordije,

    Certainly not the intended behavior... but is a known issue on an earlier Silicon revision. The R4a silicon has this resolved: 

    AD9171/2/3 were released on R2 silicon

    AD9174/5/6 were released on R4a silicon

    A later PCN has up-rev'd the AD9171/2/3 to R4a (it is posted on the product page). But while there is still R2 material in distribution (to date), you may receive R2 material still. 

    As a workaround, if this TXEN behavior is a concern, please consider using the AD9175 for now. 

    Landsman

Children