AD9154 DAC + PHY PRBS Testing

I am using a AD9154 DAC and I am trying to use PHY PRBS Testing as described in the datasheet. The DAC PLL is locked but no valid PRBS sequence is fed to the DAC inputs.

Every time when I finish the test by writing 0 to PHY_TEST_START the PHY_PRBS_TEST_STATUS shows 0xFF that means ‘pass’ for all lanes.

This result is not reasonable, as there is no valid PRBS sequence.

I have following questions:

  1.  Is there any possibility to check whether PRBS test was performed?
  2. What are the prerequisites for performing the PRBS test (e.g is STEP 4: PHYSICAL LAYER configuration mandatory?)
  • 0
    •  Analog Employees 
    on Nov 18, 2020 5:38 PM 5 days ago

    Hello, 

    for #1, if a PRBS sequence is not fed to the JRx, then the test should fail. Sounds like it did not, which implies there is an issue with the test setup.

    For #2, I am not sure I understand the question. To run PRBS the part should be configured and ready to start link bring-up (sync), including locking the SERDES PLL. 

    Landsman