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EVAL-AD9746: data clock generation

Hello,

I use EVAL-AD9746 + AD-DAC-FMC-ADP + SDP-H1.

I can't generate a vector (single tone as shown as example within UG-1624), because of the error message: "No data clock was detected"  

On EVAL-AD9746, the PLL of AD9516, seems to be unlocked. 

In my test setup, a sinusoidal 100 MHz is generated at J1 input (from R&S SMF 100A). 

U5 VCXO is not mounted on the board. REFIN2 is not connected.  

A 50 MHz is generated at J2 input from a signal generator (REFIN1).

Could help me to investigate on this ?

Thanks and regards,

Pierre BRIOTTET

Parents
  • Hi Pierre,

    The AD9516 has two options for its clock source to be distributed to the DAC, one is direct thru the CLK pins (routed to J1 at AD9747 evalboard), or either a second option is thru the output of the on-chip PLL/VCO using the REFINx pins (routed to J2). 

    For the AD9747 evalboard, it uses option one for the clock source (100MHz at J1). You should not connect a clock source to the REFINx pins since you already have the 100MHz at CLK pins of AD9516. Also, make sure to write 0b01 to address 0x1e1 using the SPI software and bypass the dividers, as discussed on the UG-1624. This will ensure that the input at the CLK pins will be the one to be distributed.

    Regards,

    Mark

  • Thanks a lot for your help.

    Actually, I modified the board configuration in order to generate DAC clock thanks to J4 SMA input connector. 

    My issue is still not resolved, the SDP-H1 does not detect Data Clock Output, so I am not able to launch a test scenario on DPGdownloaderlite.

    I measured DCO at DAC output and the signal is present on J3 when modify the position JP16. But when setting back JP16 to supply SDP-H1 with DCO signal, this signal is not detected.

    Could you please help me on this topic?

    Thanks again for your help.

    Regards,

    PierreB  

  • Hi PierreB,

    Can you upload a photo of the clock signal you're getting at J3? What amplitude are you getting? Do you also observe the same signal when you probe to pin 4 and pin 3 of U13 when JP16 is back to the original position?

    You can also try shorting JP25 and see what happens.

    Regards,

    Mark

  • Hello,

    Thanks again.

    You will find in attachment the signal measured at J3. 

    I encounter probe issues to measure cleanly the signal at U13 output. The measured signal is very noisy.

    I will try again with another probe and will provide it to you.

    Could you tell what are the mandatory caracteristics of the signal at U13 input/output?

    For information, JP25 is shorted by default.

    Regards,

    PierreB

Reply
  • Hello,

    Thanks again.

    You will find in attachment the signal measured at J3. 

    I encounter probe issues to measure cleanly the signal at U13 output. The measured signal is very noisy.

    I will try again with another probe and will provide it to you.

    Could you tell what are the mandatory caracteristics of the signal at U13 input/output?

    For information, JP25 is shorted by default.

    Regards,

    PierreB

Children
  • Hi Pierre,

    Thanks for the scope shot. For U13 input, you should expect a similar waveform you're observing at J3 output. For its output. you should expect a low voltage differential signal (LVDS) clock that has an offset at ~1.25V with peaks at ~1.5V and ~1V. So the "noise" that you're observing is maybe actually the signal as expected. The same goes for U14.

    Have you tried to remove the JP25 short?

    Regards,

    Mark

  • Hi Mark,

    My issue is still unexplained...

    You can find in attachment, the "JP16" file showing the signal at AD9746 DCO output.

    I have also attached the signal meaured at U13 output (the same shape is observed at U14 output). The file is called "U13_out". As you can see on this screenshot,  the signal is not the expected one in "shape", min/max level and offset. 

    Do you have an idea of the root cause ?

    Thanks again,

    Pierre BRIOTTET

  • Hi Pierre,

    I've tried to replicate your setup with DAC clock at J4 and DPG Downloader was able to detect the 100MHz clock. The U13 output signal you're observing is the same in my end (AC coupling, try to clip the ground wire of the probe to the outer part of any SMA connectors for better grounding). I've populated R25 with 50ohms and changed the position of JP2 and JP3 for this configuration. Do you have any modifications besides these?

    At what power level are you clocking your board? I'm clocking it at 0dBm.

    I think it has something to do with the DPG Downloader. Make sure that your software is updated and AD9747 RevB is detected in the SDP-H1 Unit 1 Panel as shown below. 

    Regards,

    Mark

  • Hello,

    Indeed, I think that my issue is that DPGDownloader does not detect AD9747 Rev B. I can only select "Generic" in the field "Evaluation Board" of DPGDownloader. 

    We suspect the same issue mentionned in the following discussion:

    https://ez.analog.com/data_converters/high-speed_dacs/f/q-a/120070/ad9747-evaluation-board

    I replied in above discussion.

    Actually, at first I shorted R22 to enable LDO supply.

    But then I understood that LDO SD input should be activated by the PIC. 

    Do you confirm?

    I think that the PIC does not contain any program (no blue LED when mini usb is plugged, and eval board is supplied in 5 V).

    Could you provide us the code for the PIC?

    Thanks and regards,

    PierreB

  • Hi Pierre,

    I've already asked for help from my colleagues regarding the PIC code. 

    Yes, the LDO SD input comes from the PIC.

    Can you confirm if ACE can't also detect the AD9747 evb on the startup window?

    Regards,

    Mark

  • Hi,

    Indeed, I confirm  that AD9746 EVB is not detected by ACE in both. Please find here below my print screens when EVB is supplied and USB connected to my PC (ACE is up to date for information).

    Thanks,

    Pierre

  • Hi Mark,

    Do you any news about PIC code? Do we need to plan to return the evaluation board for investigations on your side?

    Thanks for your feed back.

    Regards,

    Pierre

  • Hi Mark,

    Does someone can help on this topic? It becomes urgent for us to find a solution...

    Thanks for your help.

    Regards,

    Pierre