Where I can find the FPGA source code to use ADS7-V2 with AD9164-FMCB-ebz。
An email will be sent to your profile email address with a link where the code can be downloaded. This code is provided "as is" with no support. It does not include JESD204B IP which will need to come from Xilinx. Note that the Xilinx IP does not include RTL for the transport layer. We have companion transport layer code generator for our ADC's but not for DACS currently.