Products Mentioned

AD9764 Production
The AD9764 is the 14-bit resolution member of the TxDAC® series of high performance, low power CMOS digital-to-analog converters (DACs). The TxDAC®; family...
Datasheet
AD9764 on Analog.com

AD6644 Production
The AD6644 is a high speed, high performance, monolithic 14-bit analog-to-digital converter (ADC). All necessary functions, including track-and-hold (TH...
Datasheet
AD6644 on Analog.com

AD9631 Production
The AD9631/AD9632 are very high speed and wide bandwidth amplifiers. The AD9631 is unity gain stable. The AD9632 is stable at gains of 2 or greater. Using...
Datasheet
AD9631 on Analog.com

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AD9764 output



		

			

									
					    HIDIR
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Aug 14, 2012 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Hi 
    
 
    I have designed a DAQ borad including AD9764, AD6644 and it communicates with Xilinx Spartan 3AN FPGA through FX2 expansion connector. 
    
 
    As indicated in the attachments we can see the input&output connections and the clock signal (which is RC filtered version of Clockin at 16MHz coming from the FPGA) . I am wondering why i am getting the same voltages at the IOUTA and OUTB nodes at the AD9764 output (simply 0 or 20mV at the output of AD9631 opamp ) although I apply the code "00000001111111" from the FPGA. I checked the DAC inputs and see that they are as the FPGA output.  Is it about the AD9764 or the AD9631 opamp or the noise level?
    
 
    I will appreciate any help .
    
 
    Thank you very much
    
 
    HIDIR
    
									
			        
		
    

				
							attachments.zip
							
        

    
    Tags: 
                                            
                 Video Amplifiers and Analog Video Functions
                
                                                    
                 Standard High Speed D/A Converters
                
                                                    
                 ad6644
                
                                                    
                 ad9631
                
                                                    
                 Video Operational Amplifiers (Op Amps)
                
                                        
                                            
                
                
                                        
                                            
                
                
                                        
                                            
                
                
                                        
                                            
                
                
                                
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                on Aug 20, 2012 1:58 PM
            
            
					
        
	
        

		
		
        
					
        Hi Mr. Larry Welchusa
        
 
        Thank you very much for your help
        
 
        I attached the schematic pdf file. I can also send the layout files' pictures.
        
 
        In addition to the schematic i have made two differences in the layout. The first one is adding two capacitors for obtaining CLOCK signal from the incoming CLOCKIN signal (i added 100nF capacitors in serial with the AD9764 and 74LCX574(D flip flop at the AD6644 output) clock inputs ). Thus the 98th pin of the Hirose FX2 connector is then CLOCKIN. https://ez.analog.com/servlet/JiveServlet/download/59065-11376/AD9764clock.jpg
        
 
        The second is the addition of RC parallel pairs at the AD9764 IOUT pins . ez.analog.com/.../DiffAmpConfig.JPG
        
 
        Also i do not think that there is a current sourcing lack in the supplies . The AVCC=5V and it sources 315 mA (6.5V and 350mA limited by the Agilent DC power supply). The DVDD=3.3V sources 116mA (for all high input of AD9764) and it is 5.5V and 150mA limited. The AVEE=-5V sources 20 to 40 mA (only for the OPAMPs) and 8V and 100mA limited. The Vref=2.4V (only for the AD6644 and AD8138) and limited to 4.4V and 100mA (sources no current when the AVCC is connected).
        
 
        I use Tektronix oscilloscope to observe the signals. I use Xilinx SPARTAN 3AN FPGA kit (the connection to the DAQ card is established using Hirose FX2 connector).
        
 
        Thank you very much.
        
			
        

		
			
	      

		
				boardHIDIR.pdf
			
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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													0
							
			
				
									
							        
			
			
			
          
            
						
                            
            
            				
            
                on Aug 20, 2012 1:58 PM
            
            
					
          
	
          

		
		
          
					
          Hi Mr. Larry Welchusa
          
 
          Thank you very much for your help
          
 
          I attached the schematic pdf file. I can also send the layout files' pictures.
          
 
          In addition to the schematic i have made two differences in the layout. The first one is adding two capacitors for obtaining CLOCK signal from the incoming CLOCKIN signal (i added 100nF capacitors in serial with the AD9764 and 74LCX574(D flip flop at the AD6644 output) clock inputs ). Thus the 98th pin of the Hirose FX2 connector is then CLOCKIN. https://ez.analog.com/servlet/JiveServlet/download/59065-11376/AD9764clock.jpg
          
 
          The second is the addition of RC parallel pairs at the AD9764 IOUT pins . ez.analog.com/.../DiffAmpConfig.JPG
          
 
          Also i do not think that there is a current sourcing lack in the supplies . The AVCC=5V and it sources 315 mA (6.5V and 350mA limited by the Agilent DC power supply). The DVDD=3.3V sources 116mA (for all high input of AD9764) and it is 5.5V and 150mA limited. The AVEE=-5V sources 20 to 40 mA (only for the OPAMPs) and 8V and 100mA limited. The Vref=2.4V (only for the AD6644 and AD8138) and limited to 4.4V and 100mA (sources no current when the AVCC is connected).
          
 
          I use Tektronix oscilloscope to observe the signals. I use Xilinx SPARTAN 3AN FPGA kit (the connection to the DAQ card is established using Hirose FX2 connector).
          
 
          Thank you very much.
          
			
          

		
			
	      

		
				boardHIDIR.pdf
			
	
          
	
          
		
          
			
		
          
	
          
	
          
		
						
						
				
						
				
				
		
		
          
			
		
          
	
          

          

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