Query regarding Sample Error Detection(SED) built in test in DAC AD9125

We are using the DAC AD9125 in our hardware. In its data sheet a built in test setup named SED is specified. We have tried to use this functionality by configuring the DAC as described in the datasheet. Test data was supplied to the DAC inputs but the DAC is not perfoming the SED test as mentioned in the datasheet. No status flags were set during the test indicating that the test is not being done.

The testing was done as follows

DAC is configured to work in WORD Mode

I and Q data is sent to the DAC inputs as shown in the Figure 88 in the datasheet.

DAC is configured for the SED as described in page 53 of the datasheet but without enabling the DAC interrupt

Do we have to configure any other DAC registers other than those mentioned for SED test?

Expecting your reply soon

Thanks in advance

Shino Samuel

Project Engineer

C-DAC,Trivandrum

Kerala, India

Parents
  • We found solution to SED issue i mentioned above. We followed the procedure in AD9122 DAC datasheet. I found that the explanation is exact reverse of what analog mentioned in AD9125 DAC datasheet which we are using. Anyone can compare that Page 58(AD9122) and page53(AD9125). The logic example given in AD9122  perfectly works and we just implemented & verified.

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  • We found solution to SED issue i mentioned above. We followed the procedure in AD9122 DAC datasheet. I found that the explanation is exact reverse of what analog mentioned in AD9125 DAC datasheet which we are using. Anyone can compare that Page 58(AD9122) and page53(AD9125). The logic example given in AD9122  perfectly works and we just implemented & verified.

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