Output frequency of DAC

Hi Mukund -

Fdata the digital input clock frequency of the AD9753 is 150Mhz maximum. Data is input on Port1 and Port2 in an interleaved fashion.

The DAC output sampling rate and DAC data input rate are both 2X the digital input clock frequency. The CLK+/CLK- input is 2X

SFDR should be in terms of Fdac not Fdata. The SFDR charts TPC1, TPC2, and TPC3 are in terms of Fdac. The SFDR numbers in the Dynamic Specifications Table come from these charts. I think use of Fdata is a misprint in the data sheet.

For a sampling rate you need to be above 2 times your highest frequency. At Fdac = 300MSPS with your signal at 70Mhz, the first Nyquist Zone sampling image will be at 300 - 70 = 230Mhz. 230Mhz is easier to filter out with an LPF following the DAC. As you lower Fdac, filtering the image becomes more difficult.

Thanks,

Larry

Hi Mukund -

Fdata the digital input clock frequency of the AD9753 is 150Mhz maximum. Data is input on Port1 and Port2 in an interleaved fashion.

The DAC output sampling rate and DAC data input rate are both 2X the digital input clock frequency. The CLK+/CLK- input is 2X

SFDR should be in terms of Fdac not Fdata. The SFDR charts TPC1, TPC2, and TPC3 are in terms of Fdac. The SFDR numbers in the Dynamic Specifications Table come from these charts. I think use of Fdata is a misprint in the data sheet.

For a sampling rate you need to be above 2 times your highest frequency. At Fdac = 300MSPS with your signal at 70Mhz, the first Nyquist Zone sampling image will be at 300 - 70 = 230Mhz. 230Mhz is easier to filter out with an LPF following the DAC. As you lower Fdac, filtering the image becomes more difficult.

Thanks,

Larry