I'm working on a design using the AD9116.
I would like to tie the power pins to:
I would then use 2.5v signals (Xilinx V6 LVCMOS25 outputs) for all digital inputs (DB, SPI, CLKIN).
A few questions:
Also, a few possible errata in the Rev B datasheet:
Sorry for the delay in answering your questions, your questions came in a couple days before our shutdown and I los track of the questions.
Yes DVDDIO= 2.5V will work. , 700mv is plenty of headroom. for dropout.
At CVDD=2.5, Vih Min would be 1.7v and Vil max would be0.7v, part would perform best if the clk swing is closer to the supply rails..
Yes interpolating is right thing to do, Vih Min would be 1.7v and Vil max would be 0.7v.which should be Ok with the LVCMOS25.
Thank you for comments on the data sheet, I will review these and add these changes to the next data sheet revision.
Great- exactly the answers I was hoping for. Thanks for the clarifications.