What is the approximate lock time for the internal PLL in AD9125

Hi,

I'm using a 100MHz reference to DAC I/P and using the internal PLL for multiplication by 4.

I've used the recommended PLL Settings as given in Table 4 of the datasheet, but the lock times are varying in time and piece to piece.

Can I have a specification for the lock time.

Regards,

Vishnu

Parents Reply Children
No Data