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AD9119 clocking with ADF4350

Figure 148 in AD9119 datasheet shows a possible signal chain for the clock path base on ADF4350 PLL usage.

Figure 22 in ADF4350 datasheet shows the PLL output stage.

In my opinion, biasing is missing on the ADF4350 side since its output stage do not include any pullup resistors.  Unless Figure 22 is complete?  Or I misunderstand something?

AD9737A datasheet shows usage of ADF4350 as well in figure 174. Biasing is provided.  That looks good to me.

Comparing figure 173 and 174 brings me one question: is there any reason to have the 100 ohms resistor on one side or the other of the ac-coupling capacitors?

Thanks for your assistance,

Frédéric

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  • I wanted to know which of the two configurations you show in your documentation is better and why.  I felt your explanation about seeing some impedance on the input was wrong. 

    I know it is becoming increasingly rare these days that customers want to know why.  They usually just want to know how.  I belong to the why group, hence my interest in digging in your answers.

    In the end, it may impact on the layout since the 100 ohms resistor has to be the nearest to the DAC (for T-Line purpose), be it on one side or the other of the capacitors.  I want to understand the tradeoffs I will have to deal with sooner or later. I would fallback on simulations to get these details but the RFOUT output seems to be missing from ADF4350 IBIS model...

    If the reason for choosing on which side to put the resistor relates to the characterization you have done then it might not be worth to go any deeper on that subject...

    Thanks for your assistance

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  • I wanted to know which of the two configurations you show in your documentation is better and why.  I felt your explanation about seeing some impedance on the input was wrong. 

    I know it is becoming increasingly rare these days that customers want to know why.  They usually just want to know how.  I belong to the why group, hence my interest in digging in your answers.

    In the end, it may impact on the layout since the 100 ohms resistor has to be the nearest to the DAC (for T-Line purpose), be it on one side or the other of the capacitors.  I want to understand the tradeoffs I will have to deal with sooner or later. I would fallback on simulations to get these details but the RFOUT output seems to be missing from ADF4350 IBIS model...

    If the reason for choosing on which side to put the resistor relates to the characterization you have done then it might not be worth to go any deeper on that subject...

    Thanks for your assistance

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