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AD9106 external Vref gain drift?

So I thought the AD9106 was the perfect solution to my problem but now I realized that it has a fatal flaw, the 267 PPM gain drift, specified with the rather drifty internal reference, which has a 160PPM / degree C drift.

If a very stable external reference is used, how is gain drift re-calculated? I hope that maybe the datasheet writers tested the drift with a poor tempco Rset resistor as well.... (I could use a vishay foil here if it helps!)

I was hoping to knock it down an order of magnitude to make it usable..

Thank you.

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  • Ok. But do you know if disabling the internal Rset resistors has a significant impact on drift? I assume that the chips were tested using the on-board adjustable resistors, which may have poor tempco in comparison to external foil resistors... especially if they are used in rheostat mode like the block diagram implies, in most manufacturer data-sheets I see that rheostat mode digipots have a temp co at best of 30-100 ppm. I planned on disabling these and using a fixed very low temperature coefficent resistor.

    Thank you for your time and response.

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  • Ok. But do you know if disabling the internal Rset resistors has a significant impact on drift? I assume that the chips were tested using the on-board adjustable resistors, which may have poor tempco in comparison to external foil resistors... especially if they are used in rheostat mode like the block diagram implies, in most manufacturer data-sheets I see that rheostat mode digipots have a temp co at best of 30-100 ppm. I planned on disabling these and using a fixed very low temperature coefficent resistor.

    Thank you for your time and response.

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