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Help Selecting a suitable DAC.

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  •  Analog Employees 
on Feb 13, 2015

Hello All,

I am having problems finding an Analog Device's DAC that can suit my needs. 

I would really appreciate any help you can give.

  • I need a DAC that can act as a clock slave.
    • I am going to be feeing the DAC with an output from an FPGA. I want the DAC to use the clock outputted by the FPGA.
  • The FPGA will be outputting a 74.25 MHz clock.
  • I need the DAC to perform 1x, 2x and 4x interpolation (8x would also be nice but not essential)
    • This implies a max data rate of 300 MSPS (if 8x is used then 600 MSPS is needed).
  • The DAC needs to receive 12 bit TTL inputs
    • I can also receive LVDS.
  • The DAC needs to be configurable via SPI or I2C or similar standard.

If we can find a DAC that suits my needs they I will recommend it to all of my customers.

Thanks and Regards,

Rob

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    •  Analog Employees 
    on Feb 23, 2015 11:53 PM over 6 years ago

    What kind of performance do you need from the DAC? For high performance applications, you would not typically use the FPGA as the clock source for the DAC since there are better performance clock sources available, such as ADI's ADF series of PLLs.

    I'm trying to understand your question better. When you say max data rate of 600 MSPS, I think you mean max DACCLK rate. Is that true? Will you always be transferring data to the DAC (what we would call the "data rate") at 74.25 MSPS? And then you want to interpolate it to as high as 594 MSPS DAC Update Rate?

    For these functions and DAC rate, I would suggest you check the AD9122 (16-bit, 1.2 GSPS dual) or the AD9785 (12-bit, 800 MSPS dual).

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    •  Analog Employees 
    on Feb 23, 2015 11:53 PM over 6 years ago

    What kind of performance do you need from the DAC? For high performance applications, you would not typically use the FPGA as the clock source for the DAC since there are better performance clock sources available, such as ADI's ADF series of PLLs.

    I'm trying to understand your question better. When you say max data rate of 600 MSPS, I think you mean max DACCLK rate. Is that true? Will you always be transferring data to the DAC (what we would call the "data rate") at 74.25 MSPS? And then you want to interpolate it to as high as 594 MSPS DAC Update Rate?

    For these functions and DAC rate, I would suggest you check the AD9122 (16-bit, 1.2 GSPS dual) or the AD9785 (12-bit, 800 MSPS dual).

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