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AD9106 Production
The AD9106 TxDAC® and waveform generator is a high performance, quad digital-to-analog converter (DAC) integrating on-chip pattern memory for complex waveform...
Datasheet
AD9106 on Analog.com

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AD9106



		

			

									
					    bronco
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Apr 16, 2015 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Hi,
    
 
     
    
 
     
    
 
    I'm looking for configuring an AD9106 for automatic calibration,
    
 
    I provide a clock to the dac 10 mhz,
    
 
    what value I have to write in the field "CAL_CLK_DIV" for I have 500KHZ?
    
 
    how do I change the value in register 0x08 ?
    
 
    Thanks
    
 
    Roberto
    
								
    

				
				
		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    


	
    
		
	
    















    
	
    
	
    
					



			








	
	
	
	



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													0
							
			
				
									
							        
			
			
			
        
            
			                            
                        
                on Apr 17, 2015 8:47 PM
            
            
					
        
	
        

		
		
        
					
        Thanks Larry,
        
 
        I have another question, I use datasheet REV.A, in the register summary is written that
        
 
        SRAM_DATA  (add0x6000 to 0x6FFF)  are mapped : "15:12 reserved" and "11:0 sram_data",
        
 
        but this is not correct, the right map is "15:4 sram_data" and "3:0" reserved.
        
 
        Furthermore is data signed?
        
 
         
        
 
        Thanks
        
 
           Roberto
        
 
         
        
 
         
        
 
         
        
			
        

		
		
		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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													0
							
			
				
									
							        
			
			
			
          
            
			                            
                        
                on Apr 17, 2015 8:47 PM
            
            
					
          
	
          

		
		
          
					
          Thanks Larry,
          
 
          I have another question, I use datasheet REV.A, in the register summary is written that
          
 
          SRAM_DATA  (add0x6000 to 0x6FFF)  are mapped : "15:12 reserved" and "11:0 sram_data",
          
 
          but this is not correct, the right map is "15:4 sram_data" and "3:0" reserved.
          
 
          Furthermore is data signed?
          
 
           
          
 
          Thanks
          
 
             Roberto
          
 
           
          
 
           
          
 
           
          
			
          

		
		
		
		
	
          
	
          
		
          
			
		
          
	
          
	
          
		
						
						
				
						
				
				
		
		
          
			
		
          
	
          

          

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