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The AD9102 TxDAC and waveform generator is a high performance digital-to-analog converter (DAC) integrating on-chip pattern memory for complex waveform...
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AD9102 on Analog.com

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AD9102 - Differential To Single Ended Voltage



		

			

									
					    JCole
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Apr 20, 2015 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    We are attempting to use the following circuit to produce a single ended voltage ramp on the output:
    
 
    
 
    The circuit is based on the circuit used in the AD9102 eval board, except that there is no negative supply (-Vs is tied to ground instead).   
    
 
    The AD9102 is generating a 1ms ramp that looks fine when probed directly at the outputs of the AD9102, but then appears distorted at the output of the ADA4817.  It seems as though the AD4817 is integrating the signal.  This distortion/integration occurs with or without the feedback capacitor C17 installed.  
    
 
    Any suggestions on what might be happening?
    
 
    Thanks
    
 
    JCole
    
									
			        
		
    

				
						
        

    
    Tags: 
                                            
                 ad9102
                
                                                    
                 clock and timing
                
                                                    
                 Direct Digital Synthesis (DDS)
                
                                
            
    
    
    

		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    
















    
	
    
	
    
					



			








	
	
	
	



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                on Nov 3, 2019 1:17 PM
            
            
												
						in reply to JCole
					
									
        
	
        

		
		
        
					
        Larry:
        

        I have a few related questions:
        

        Q1. Missing a buffer?
        

        The AD9102 Eval Board schematic shows a Diff. Amp (using ADA4817) right after the 2x 249 termination R.  Shouldn't there be a buffer in between?  Otherwise Ad9201 Ioutp and Iooutn see not 249ohm, but 249ohm // (2x499ohm) which will cause poor THD at the Diff. Amp output.
        

        Q2. AD9102 Ioutp / Ioutn both source current or one sources and the other sinks?
        

        Data sheet claims them to be differential, but DAC output current equations suggest they are not differential but complimentary.  for instance, according to the equations: if Iout=4mA, then Ioutp=4mA, Ioutn=0mA.  If they are differential, then they should be Ioutp=+2mA (source), Ioutn=-2mA (sink).  Data sheet has no additional info. on internal structure of DAC Iout (push-pull?)
        

        Below is a screen shot from AD9102 data sheet.
        

         
        

        Q3. What is total Iout?  Iout=Ioutp - Ioutn ?
        

        Q4. "Output Compliance Voltage" refers to Ioutp Ioutn individually or differentially?
        

         
        

        Eval Board has Rset=8.06K which results in Ioutfs=4.129mA which results in IoutP(fs)=4.129mA and IoutN(fs)=0mA.
        

        This means VoutP(fs)=4.129mAx249ohm=1.028V which exceeds the 1.0V compliance voltage spec. listed above.
        

        Please  clarify.
        

        Thank you!
        

        James Y.
        
			
        

		
			
	      

		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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