We're having some trouble with an AD9707. We're clocking it at 122.88MHz from a LVPECL output of an AD9511 that should meet differential clock level specifications of AD9707 and we've checked that it does. We're using a ramp generator as data source and we haven't yet adjusted/compensated skew or other possible delays. We've checked that the data arrives OK.
After powerup a microcontroller writes 0b10000100 to register 0x02 to enable differential clock mode and two's compliment input. We then read back register 0x02 and we read exactly what we wrote. O'scoping the SPI signals confirms that SPI does work. We output MSB first which should be the default mode after powerup.
EDIT: forgot to mention that this is the only configuration we do after powerup, we don't read/write any other register.
Our schematic is pretty much the same as datahseet's figure 70, using the same 16k resistor as Rset and 1k resistor across balun (a MABA-007237-ETC410 in our case) and OTCM tied to ground. PIN/SPI/RESET is also tied to ground (hardwired).
We're supplying three different power rails, two independent 2.5V rails for analog and digital sections (we use LVCMOS 2.5 levels for data signals) and a 3.3V rail for clock input, shared with the analog part of AD9511. All rails are within spec and the current drawn from analog and clock rails is within specs too (can't check digital 2.5, we don't have a current monitor there).
The problem is that in these conditions the output stays at 0V, we see no variation. With skew and clock delay uncompensated we at least expected to see garbage but we see nothing. Our scope has 1,5GHz analog bandwidth. I've read parts of the datasheet and I can't find any obvious reason why it shouldn't be working. Any clues?
EDIT: also forgot to mention that we have a filter after the balun but we've checked the output before the balun (directly at the output pins), after the balun and after the filter and there's nothing in any of these points.
Thanks in advance