AD9106/AD9102 clock issue

Question

I have a really strange issue with SPI communication on the AD9106. 
 When I disable my DAC clock (TI CDC421 156 MHz LVPECL), SPI communication (330 kHz) works great, but when I turn the DAC clock on, I lose SPI communication-- I can no longer read from the registers. 
 How could the DAC clock affect SPI communication? 
 Perhaps I'm not terminating my DAC clock or AC-coupling it properly, but I think it's fine: 
 
 I see the common mode voltage properly sitting at 0.9 V and I see a 500 mV peak-to-peak swing from CLKP to CLKN 
 One thought is that there might be a setup time issue that arises with using the faster clock. 
 Or, if I'm not terminating it correctly, there's some sort of over-current issue? 
 I'd really appreciate some insight into what might be going on. 
 Pete

yorkpa · Accepted Answer

I ended up using an LVDS clock (IDT ICS844021-01 at 166.66 MHz) and powering the AD9106 at 1.8 V. This seems to work well. 
 When I was powering the AD9106 at 3.3 V, CLDO was ~1.4 V, which seemed bad. Now, when powering the chip at 1.8 V, CLDO correctly read ~1.8 V.)

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AD9106/AD9102 clock issue