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AD9102 - Trouble with DDS mode and reading from SRAM??

I have the AD9102 EVboard and I can get all modes to work: constant value, Sawtooth, DDS, and reading from SRAM.  However, on my proto-layout board, I program the Ad9102 SPI directly and I can only get the constant value and Sawtooth mode to work.  The DDS and read from SRAM do not give any output.  I am taking the regval and default sequence from the EVboard software and and programming into AD9102 SPI directly.  So inputting example4 settings gives me the pulsed triangle wave for the sawtooth mode which is working, but the sine wave of example6 is not working.  The registers and SRAM are able to read and write properly. Is this a common problem or am I missing something obvious?  Any help would be appreciated, thanks.

  • Can you get continuous sine wave in DDS mode?

  • No, I can't get the sine wave in DDS mode.  The only mode I can get to work is sawtooth mode.  DDS mode and reading from SRAM do not work for me.  Do you know if there's a special sequence of SPI registers to program in order to use DDS mode?  

  • What's the sinewave frequency you set? any bandwidth limitation on your DAC output path? what's the value of register 0x27? Can you post your register configuration sequence? I can try your sequence in our lab. thanks.

  • So I was just trying to get my protoboard to run example6 from EVboard which has sine wave at something like 2.3MHz.  I take the register settings from example6 sequence as shown below.  On the tester yesterday, I am able to get my protoboard to output a sine wave for a few cycles, but then shuts off.  The EVboard runs example6 sine wave continuously.  I try to match the timing of SPI commands exactly like EVboard, which is doing 822kHz clock, but ~150uS delays between address and data, and between each individual register.  I do make all the register programs while trigger pin is high, then bring trigger low about 150uS after CSB gone high. Is this possibly too short a delay?  Also, is there a specific way to program in order to get the continuous mode to stick in the registers?

    So for my application, being in DDS mode and reading the pattern directly from SRAM is what I really need, which is really similar to example2.  I am able to get EVboard to do exactly what I want, but my protoboard doesn't seem to load up example2 at all.  I am using the exact sequence from the example2 of EVboard as well.

    Whatever help you can give on the sine wave or the SRAM reading would be great.  Thanks!

    Dan

    example6 seq:

    0000h 00h
    0001h E00h
    0002h 00h
    0003h 00h
    0004h 4000h
    0005h 4000h
    0006h 4000h
    0007h 4000h
    0008h 00h
    0009h 1F00h
    000Ah 1F00h
    000Bh 1F00h
    000Ch 1F00h
    000Dh 00h
    000Eh 00h
    000Fh 00h
    0010h 00h
    0011h 00h
    0012h 00h
    0013h 00h
    0014h 00h
    0015h 00h
    0016h 00h
    0017h 00h
    0018h 00h
    0019h 00h
    001Ah 00h
    001Bh 00h
    001Ch 00h
    001Fh 00h
    0020h 0Eh
    0021h 00h
    0022h 00h
    0023h 00h
    0024h 00h
    0025h 00h
    0026h 1212h
    0027h 1232h
    0028h 111h
    0029h FFFFh
    002Ah 101h
    002Bh 101h
    002Ch 03h
    002Dh 00h
    002Eh 00h
    002Fh 00h
    0030h 00h
    0031h 00h
    0032h 4000h
    0033h 4000h
    0034h 4000h
    0035h 4000h
    0036h 01h
    0037h 7E00h
    0038h 00h
    0039h 00h
    003Ah 00h
    003Bh 00h
    003Ch 00h
    003Dh 00h
    003Eh 750h
    003Fh 7500h
    0040h 00h
    0041h 00h
    0042h 00h
    0043h 00h
    0044h 02h
    0045h 00h
    0046h 00h
    0047h 00h
    0048h 00h
    0049h 00h
    004Ah 00h
    004Bh 00h
    004Ch 00h
    004Dh 00h
    004Eh 00h
    004Fh 00h
    0050h 2710h
    0051h 00h
    0052h 00h
    0053h 01h
    0054h 00h
    0055h 00h
    0056h 00h
    0057h 01h
    0058h 1770h
    0059h 00h
    005Ah 00h
    005Bh 01h
    005Ch FA0h
    005Dh 00h
    005Eh 00h
    005Fh 7FFFh
    001Eh 01h
    001Dh 01h
  • can you try to set reg0x27=0x1231 to see if you can get continuous sinewave?

    And writing 0x1230 to reg0x27 is reading data from RAM.

  • Hi Biao,

    I have tried many times to use 0x1231 and 0x1230, but still having trouble getting AD9102 output to read from SRAM.  I don't get the continuous sine wave like the EVboard, but I care more about reading from SRAM.  So the interesting part today was that I made some patterns to match the SPI reg writes for the EVboard's DAC1 tab and Pattern Config tab.  What I am seeing is the 0x0027 register bits do not stick whenever I send in example2, example5, or my own reg settings for DDS mode off SRAM. Reading back 0x0027 always seems to be 0x0101.  Example4 does work and reads back 0x3212 on 0x0027 reg. 

    Writing DAC1 tab settings first, then Pattern config tab settings second causes 0x0101 to be in 0x0027 reg.  If I do Pattern Config tab settings first, then DAC1 tab settings, then 0x0027 reg goes to 0x3030.  This is telling me that there seems to be a special sequence to get all the reg settings to stick, or that the internal switches for DDS mode are damaged and can't be turned on.  Do you have any common info on AD9102 and whether it needs special SPI sequences?   I attach my SPI address sequence from my scoping the EVboard SPI.

    Dan

    DAC1 tab setting address sequence:

    0x0045

    0x005D

    0x005E

    0x005C

    0x005E

    0x0027

    0x001F

    0x002B

    0x0035

    0x0025

    0x003E

    0x003F

    0x0043

    0x0031

    0x0037

    0x0047

    0x005F

    0x001D

    Pattern Config tab setting sequence:

    0x0029

    0x0028

    0x0044

    0x0060

    0x002C

    0x002D

    0x0020

    0x001D

  • Hi Dan,

        Can you try the example 1 sequence in the quick start guide? that uses SRAM data only to DAC. the results are shown below.

        if it still cannot work with example 1 sequence, please check if all the registers are configured correctly.

        if all the registers are written correctly, you may need to check the schematic to see all the connections are correct.

    Power supply is also critical. making sure the power supply is clean enough.

    the sequence as below.

    0000h  0000h

    0001h  0e00h

    0002h  0000h

    0003h  0000h

    0004h  4000h

    0005h  4000h

    0006h  4000h

    0007h  4000h

    0008h  0000h

    0009h  1f00h

    000ah  1f00h

    000bh  1f00h

    000ch  1f00h

    000dh  0000h

    000eh  0000h

    000fh  0000h

    0010h  0000h

    0011h  0000h

    0012h  0000h

    0013h  0000h

    0014h  0000h

    0015h  0000h

    0016h  0000h

    0017h  0000h

    0018h  0000h

    0019h  0000h

    001ah  0000h

    001bh  0000h

    001ch  0000h

    001dh  0000h

    001eh  0000h

    001fh  0000h

    0020h  000Eh

    0021h  000Eh

    0022h  0000h

    0023h  0000h

    0024h  0000h

    0025h  0000h

    0026h  3030h

    0027h  3030h

    0028h  0111h

    0029h  ffffh

    002ah  0101h

    002bh  0101h

    002ch  0003h

    002dh  0000h

    002eh  0000h

    002fh  0000h

    0030h  0000h

    0031h  0000h

    0032h  4000h

    0033h  2000h

    0034h  2000h

    0035h  4000h

    0036h  0001h

    0037h  0200h

    0038h  0000h

    0039h  0000h

    003ah  0000h

    003bh  0000h

    003ch  0000h

    003dh  0000h

    003eh  0000h

    003fh  0000h

    0040h  0000h

    0041h  0000h

    0042h  0000h

    0043h  0000h

    0044h  0000h

    0045h  0000h

    0046h  0000h

    0047h  0000h

    0048h  0000h

    0049h  0000h

    004ah  0000h

    004bh  0000h

    004ch  0000h

    004dh  0000h

    004eh  0000h

    004fh  0000h

    0050h  07d0h

    0051h  0000h

    0052h  fff0h

    0053h  0100h

    0054h  03e8h

    0055h  0000h

    0056h  fff0h

    0057h  0100h

    0058h  0bb8h

    0059h  0000h

    005ah  fff0h

    005bh  0100h

    005ch  0fa0h

    005dh  0000h

    005eh  fff0h

    005fh  0100h

    0060h  0000h

    0061h  0000h

    0062h  0000h

    0063h  0000h

    0064h  0000h

    0065h  0000h

    0066h  0000h

    0067h  0000h

    0068h  0000h

    0069h  0000h

    006ah  0000h

    006bh  0000h

    006ch  0000h

    006dh  0000h

    006eh  0000h

    006fh  0000h

    0070h  0000h

    0071h  0000h

    0072h  0000h

    0073h  0000h

    0074h  0000h

    0075h  0000h

    0076h  0000h

    0077h  0000h

    0078h  0000h

    0079h  0000h

    007ah  0000h

    007bh  0000h

    007ch  0000h

    007dh  0000h

    007eh  0000h

    007fh  0000h

    the SRAM data as below.

    0

    0

    0

    0

    0

    0

    0

    0

    0

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    0

    0

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  • Hi Biao,

    I didn't get to create the example1 patterns, but I did have example2 patterns already.  I believe ex2 does use only the SRAM addresses out to DAC.  I do see that the WAV_CONFIG reg reads back as 0x0001 instead of 0x3030.  If i try to program WAV_CONFIG alone, it will read back correctly, but i don't understand why it would get pushed out when i program a string of the registers together. Note that example4 fires up no problem on my protoboard, just not the SRAM modes.

    So I put a 3.3V regulator for each of the power supply pins, using ferrite bead inductor to 2 caps, and I also put 100pF and 0.1uF up close to the AD9102 pin.  All grounds are to ground plane. 

    -What would be the result of noise feeding to the supplies? could that cause registers to lose value?

    -I read that writing the RAMUPDATE bit pushes the buffered register settings to the active register settings.  How many times can you do a RAMUPDATE before active register goes to 0x0 or default value? 

    -Does RAMUPDATE clear any registers that were not written into the buffer registers?

    -Do you know of any specific sequence order of registers that need to be programmed?  I note the reg sequence for the DAC1 tab programming from EVboard below.

    Thanks again for the help.

    Dan

    DAC1 tab write:

    0x45

    0x5D

    0x5E

    0x5C

    0x27

    0x1F

    0x2B

    0x35

    0x25

    0x3E

    0x3F

    0x43

    0x31

    0x37

    0x47

    0x5F

    0x1D

  • Hi Dan,

         AD9120 power operation range can be from 1.8V to 3.3V. that's much more flexible, but you still may need to check if there has the big voltage drop or ripple/spur on each power rail. If you can send me the schematic, that will be helpful for understanding the issue deeply. You are using LDO or DC-DC regulator?

        Also the RESET pin connection needs to be looked into carefully. making sure it's clean.

        Example 1 or 2 configuration sequence is correct. RAMUPDATE can't reset all the registers to default values.

        Read or write SRAM shall follow the configuration mentioned in datasheet. Also Start_ADDR/STOP_ADDR should be configured correctly.

         To write to any SRAM address, set up the PAT_STATUS register (Register 0x1E) as follows:

     BUF_READ = 0 

         MEM_ACCESS = 1 

         RUN = 0

    To read data from any SRAM address, set up the PAT_STATUS as follows: 

         BUF_READ = 1 

         MEM_ACCESS = 1 

         RUN = 0

    please make sure all the registers and SRAM can be written or read correctly.

  • Hi Dan,

    Could you please share the register configuration to get Sawtooth output? 

    I set the same sequence in example4 but get something wrong.

    My all hardware connections are true and I can get sinusoidal output by using example6 but I don't get how I can't get a triangular output by using the example4 configuration.

    Best Regards,

    Dogukan