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Q&A AD9106 SRAM

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AD9106 Production
The AD9106 TxDAC® and waveform generator is a high performance, quad digital-to-analog converter (DAC) integrating on-chip pattern memory for complex waveform...
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AD9106 on Analog.com

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AD9106 SRAM

tzs0023

on Aug 12, 2015

The auto-increment statement on pg. 21 is incorrect.

During write the address pointer decrements.

During read the address pointer does not move.

Tags: clock and timing sram ad9106 Direct Digital Synthesis (DDS)

0 ADIApproved

on Aug 12, 2015 3:27 PM
Hi -

Please send your register settings and a scope capture showing the SPI signals.

Thanks
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0 tzs0023
on Aug 12, 2015 8:18 PM
Here's an Excel file with the register values, sequential write and read operations. There are images to accompany the write and read.

Forum.xlsx
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0 tzs0023
on Aug 23, 2015 5:06 PM
It's been two weeks... Is anyone going to reply?
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0 tzs0023
on Aug 23, 2015 5:07 PM
It's been two weeks... What is going on?
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0 tzs0023
on Sep 24, 2015 9:02 PM
It's been another month! Is anyone from AD going to answer this?
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0 ADIApproved

on Nov 20, 2015 10:25 PM
Hi -

Are you still having problems with this?

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0 tzs0023
on Nov 23, 2015 3:46 PM
Larry,

I've had this working for a while. I was posting on here so that it could be verified by you. This will make the rest of the community aware of the error in the datasheet.
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