AD9740 Behavior of Clock Stopping


Please let me know about clock specification and device behavior.

Since there is no MAX specs for timing, I would like to know behavior when clock slowly or stopped.

For reducing current consumption, I expect to able to stop clock intermittently.

When SLEEP pin is Low, does AD9740 keep current output even if clock input stopping?

And then clock re-start, will AD9740 take(latch) DB[9:0] and it changes IOUTA/B?

Thanks and