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AD9106 Sawtooth frequency range as function of CLK

Today I've had a real long look at the datasheet, trying to figure out the lowest sawtooth frequency possible given a certain clock frequency CLK. This information is critical to see if I need two separate IC's or if I can do with a single AD9106.

From the four lines on page 27 (Rev. A), I assume that the sawtooth generator runs at CLK and you can divide the clock up to 64x by means of SAW_STEPx field, thus each sawtooth step would take 64/CLK seconds. To calculate the sawtooth frequency, I guess I would need to know the number of steps, i.e. the number of bits of the sawtooth waveform counter?

Let's say that CLK = 180MHz, the sawtooth generator has 12 bits (i.e. 4096 steps) and the SAW_STEP register is 63, the lowest sawtooth frequency would be (180MHz/63)/4096 = 697.5Hz, correct? Can anyone confirm the number of steps for a full sawtooth waveform?

I do realise that one can lower the frequency by choosing a lower CLK frequency, the question comes down to 'what is the biggest difference in frequency between the DDS sine wave and sawtooth waveform?'

Thanks in advance!

  • Hi -

    The SAW_STEPx[7:2] bit fields in the SAWx_yCONFIG registers allow you to program the number of clock cycles (samples) in each SAW waveform step. The SAW generator puts out one saw tooth wave in each pattern period.


  • Hi Larry,

    thanks for your answer. Nevertheless, there is still one critical piece of information missing to completely answer the question.

    My goal is to generate one entire ramp per pattern period, without the gap or 'silence' as can be seen in Fig. 51 (rev. A). In other words, I want the next ramp to start as soon as the previous ramp was completed. From your answer, I understand that I will have to shorten the pattern period to match the sawtooth period. To do so, I would have to set the pattern period to equal the number of steps of the sawtooth waveform. Neither from your answer, nor from the datasheet, the number of steps in one ramp is clear.

    Another way of interpreting your statements is that the sawtooth generator is in fact (a fraction of) the pattern period counter, which has 65536 counts. But then, what would happen to the sawtooth frequency when the generator is free-running, i.e. without patterns enabled?

    From another user on this forum, I've seen that the 14bit AD9102 ramps up and down from 0 to 16384.Since the AD9106 is roughly equivalent to the 12bit version of AD9102, you could also conclude that the 12bit AD9106 should ramp up and down from 0 to 2^12= 4096.

    In any case, the question comes down to 'how many counts does the sawtooth generator have?'. Can you comment on this?

  • Hi -

    The AD9106 is a 12 bit version of the AD9102. The saw tooth generator has 4096 steps.


  • Tests with the AD9106 have shown that with a clock of 174.8MHz and SAW_STEP set to 32, the ramp frequency is ~333.8Hz. Another setting, SAW_STEP = 55 gives about 195Hz. This would indicate that the sawtooth generator has 2^14=16384 steps and not 4096. The DDS frequency calculations are consistent with the datasheet, so I assume that this rules out erroneous register settings on DAC hold etc. Luckily, this works in my benefit.

    Larry, if you agree, could you mark my comment as 'correct', for others to use this information? If not, please advise where I could have made a mistake.

    In short, the equation below gives consistently the correct sawtooth frequency in my setup:

    f_{saw} = f_{dac}/(2^14 * SAW_STEP).

  • Yes, it turns out that the SAW generator has 16384 steps. You are correct.


  • Hi,

    Could you please share the register configuration of sawtooth wave that you have set?



  • I know I am re-opening this thread after a long time passed, but I needed clarification about AD9106 and I share the result.

    It is clear that the SAW generator internally has 2^14 steps, so frequency is actually 1/4 of what is expected by simply dividing the clock by the number of "expected" steps, where expected is 2^12 being the AD9106 specified as a 12 bit DAC.

    But what about the output steps from SAW generator? From the block diagram in the datasheet, I should expect that these 14 internal bits are right-shifted twice and the output waveform has a 12-bit resolution, being the output DAC a 12-bit device.

    From some first measures, I was not able to see the steps, too small for an 8-bit scope. But after re-arranging the testbed, I got a step amplitude in agreement with my guess of an actual 12-bit output resolution based on the datasheet block diagram.


  • Hello Enrico,

    Good day. Please refer to FAQ17 from this link.

    Many Thanks,


  • Thank-you Lorenz,

    I got it.

    Best regards,