Typos in AD9779A Rev C datasheet

The main changes between AD9779A datasheet rev B and rev C, published September 2017, are related to the removal of support for Automatic Timing Optimisation. Whilst this has been implemented correctly on page 30, with register 0x03 bit 7 changed to "Reserved (set to 0)", this seems to have been done incorrectly on the duplicate information on page 28: Register 0x03 bit 7 is still shown as "DATACLK delay mode". What's more, Reserved register 0x03 bit 6 has been changed from "set to 1" to "set to 0" which is inconsistent with both the duplicate copy on page 30 as well as datasheet rev B. It seems to me that Register 0x03 bit 6 on page 28 should not have been modified and instead bit 7 should have been modified to say "Reserved (set to 0)".

In addition, the revision history on page 3 mentions that register 0x09, bits 6:5 on page 30 have been modified. Firstly, this register is on page 31, and secondly, it appears to contain identical information to the previous revision.

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