Is the following scheme OK for biasing the AD9707 inputs. Is there any potential problem when no clock is provided (i.e. both inputs equal? FWIW clock frequency is 40 or 80MHz. The AD9707 supply is 3.3V.
Assumed answered offline.
No answer whatsoever, whether on or offline.
OK, thanks for your reply. So sorry for letting this one slip through the cracks. Are you still needing a reply or have you moved on? The former support Engineer has left ADI, so I will need to do some research to find the answer for you if you still need it.
I have implemented it and apparently it works on the prototypes. The clock is provided by a low jitter clock generator that is programmed and enabled long after the system powers up. Even though I think the circuit is safe and bias is within the limits, it would be good to know if there is no loose ends with it.
The circuit is not what we would recommend but if it is working, you may not want to mess with it. You would need to "qualify" the implementation over temperature and supply variations to prove out the robustness of the solution. If you are going to change it, I would suggest following the AD9707 eval board example: