How to Use Two Channels in AD9789 Channelized Mode?

hi

I want to know how to use two channel in AD9789 channelized mode.
We have already completed one channel.
Our system is shown below.
Fdac = 2.4GHz
Fbaud (= FS frequency?) = 10.762238MHz
LVDS, BUSWDTH = 32, DATAWIDTH = 16
P/Q =
P(HEX) P(DEC) Q(HEX) Q(DEC) P/Q
A79400 10982400 C06000 12607488 0.871101365
The table above shows I3 and Q3, but if we use only 2 channels, can we output data like 'A' in FPGA?
If LTNCY is 3, is 'B' correct or 'C' correct?
(LTNCY [2: 0] explains that 'C' is right. If so, should it be delayed one space in 'A'?)

And is the same as above regardless of CHANPRI value of register 0x20 [2]?
Thank you for your help.