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AD9102 Trigger and UPDATE bit (0x1D)

Thread Summary

The user encountered issues generating a sine wave from the AD9102 DAC after configuring registers from an example file and manually triggering the device. The solution involved setting the RUN bit in the PAT_STATUS register (Register 0x1E) to 1, which resolved the SPI communication and allowed the sine wave to be generated. Key registers for AD9102 configuration and troubleshooting were also discussed.
AI Generated Content

Hello everybody,

tried to send the registers which are in the example6.regval to FPGA, after that, I sent 0x01 to register 0x1D and then set Trigger high and low. But I have no Sine wave from DAC.

1- Should I repeat UPDATE bit (0x1D) for the trigger as well?

2- Is any specific time for trigger needed?

3- Is any specific time for UPDATE bit (0x1D) needed?

4- For Sine wave from DDS, should I write some data into the RAM? 

5- How can I read the sent data (from FPGA) through AD9102 software?

Regards,

Akbar

Edit Notes

DDS
[edited by: akbar at 2:54 PM (GMT 0) on 30 Apr 2019]