i am using ad9162 with kcu105 board. DAC operatred with sampling rate 5 GSPS with lane rate as 12.5 gb/s.
Went through the datasheet of AD9162, i have attached the ordering explained but there seems to be ambiguity.
The sample 0 to sample 15 as follows
0x0100, 0x1110, 0x2120, 0x3130, 0x4140, 0x5150, 0x6160, 0x7170, 0x8180, 0x9190, 0xA1A0, 0xB1B0, 0xC1C0, 0xD1D0, 0xE1E0, 0xF1F0.
what should be order in which the 256 bits to be send to JESD IP (xilinx, Tdata) ?, please clarify.
Sorry for letting this slip through the cracks. It has been moved into the appropriate forum (high-speed DACs). Let us know if you still need assistance. If you have resolved your issue, let us know how it was resolved. Thanks.
Assumed answered offline.