Phase shifting the clock of a DAC (JESD204B)

When using JESD, are the DACs (e.g. AD9163 and AD9164) going to have issue if we start to shift the phase of the clock? If so, is LVDS a way around this (e.g. LTC2000)? We are thinking of shifting the clock by about 50ps for equivalent time sampling.

Thanks in advance.