JESD and AD9164



I am using the AD9164-FMC-EBZ Eval board in conjunction with the VCU108 development board. I have created a vivado project that contains the JESD IP, a MicroBlaze, an RTL block that allows gpio to interface with an AXI peripheral, and an RTL block that allows gpio to interface with a SPI peripheral. My MicroBlaze is connected to the AXI and SPI interface blocks, which allows me to control the AXI and SPI functions from custom C code. Currently, control of the AD9164 via SPI has been disabled in favor of letting ACE control it. 

JESD Parameters:

These are the parameters given in ACE. My JESD IP has been configured to match these. Subclass0, LaneRate=12.5Gbps, L=8, M=1, F=1, S=4, K=32, N=16, NP=16. Via the JESD IP AXI interface, I am also setting CS=0, CF=0, HD=1, SCR=1, ILA Multiframes=4. These changes occur on startup and the JESD IP is reset afterwards, per the pg066-jesd204.pdf manual. 


I am having trouble establishing the JESD link. The ACE GUI tells me that Good Checksum for lanes 0-3 is reliably set correctly, but nothing else seems to work as it should. CGS for lanes 0-3 passes randomly, Frame Sync for lanes 0-3 passes randomly, and ILAS for lanes 0-3 has passed a couple times but not often. Lanes 4-7 are almost never successfully set in any category. I have been debugging for many days now and can't seem to make any progress. What could I be doing wrong?


corrected errors
[edited by: JacobC at 9:49 PM (GMT -5) on 20 Nov 2018]