We are evaluating the AD9144 using the AD-FMCDAQ2-EBZ evaluation board and have questions relating to the output of the DAC in relation to the Digital Gain and DC Offset Test features (“the 2 problems I see are, 1: I can't get the output to work when digital gain is disabled. 2: this DC Offset "test mode" doesn't work”). Please see below:
Initial questions:
We are using the AD9144/AD9680 FMC mezzanine evaluation card on a KC705 xilinx eval board.
We're using microblaze to configure the AD9144, and have achieved JESD synchronization (and all internal PLLs) and can output data.
I have observed that this is only true when I enable the Digital Gain.
Otherwise the output from the JESD interface does come out the DAC (BSM is disabled, PDP disabled, 4x interpol, Dual A (Dac0 & Dac1)....)
ad9144_spi_write(0x111, 0x20); // This enables the Digital Gain
Also, I cannot get the DC Test function to work. I do something like this:
ad9144_spi_write(0x520, 0x02); // DC Test Enable
ad9144_spi_write(0x146, 0x00); // DC Datapath Disable
xil_printf("AD9144 DC Test value: 0xFFFF. \r\n");
ad9144_spi_write(0x521, 0xFF); // DC Test ValueI0 LSB
ad9144_spi_write(0x522, 0xFF); // DC Test ValueI0 MSB
But the outputs donot goto the DC offset value set?
I downloaded the AD9144 SPI program, but unless you have the eval waveform programmer it does not give out SPI register settings for different configurations.
I pointed out some details in the datasheet the customer should consider and he provided the following:
TXEN is tied high, and the TXEN_MASK is also enabled.
Here is how I turn the DC Offset on:
ad9144_spi_write(0x135, 0x01); // DC Offset Enable
ad9144_spi_write(0x136, 0xFF); // DC Offset I LSB
ad9144_spi_write(0x137, 0x3F); // DC Offset I MSB
ad9144_spi_write(0x13c, 0x75); // Digital Gain I LSBs
ad9144_spi_write(0x13d, 0x05); // Digital Gain I MSBs
Its frustrating. The 2 problems I see are, 1: I can't get the output to work when digital gain is disabled. 2: this DC Offset "test mode" doesn't work
