RF Signal Strength issue in custom board

Hi,

I moved your question to High-Speed DACs community. Someone should be able to answer your query.

Best Regards,
Goz

Okay

Thank you for quick response.

There might be multiple different things that might cause this issue. What is the input clock power level to the DAC? what is the output DAC bias current that you selected for the DAC output?

Could you please send us the DAC configuration setup.

Hi Saberbf,

Please find attached DAC configuration setup file.

library IEEE;
use IEEE.STD_LOGIC_1164.all;

package PKG_SPI_CONF_AD9739 is

type MEM_AD9739 is array(0 to 19) of std_logic_vector(15 downto 0);
signal CONF_AD9739 : MEM_AD9739 := (
   -- Serial port configuration
   x"0000",
   -- Soft Reset
   x"0020",	
   -- Clear reset bit
   x"0000",
   -- CNT_CLK
   x"0203",	
   -- TxDAC Iout setting
   x"0600",
   x"0702",
   -- TxDAC Mode
   x"0800",
   -- Set common-mode voltage of DACCLK inputs
   x"220F",
   x"230F",
   -- Configure Mu Controller
   x"2430",
   x"2580",
   x"2744",
   x"286C",
   x"29CB",
   -- Enable Mu
   x"2602",
   x"2603",
   -- Set 
   x"1372",
   -- Enable RX controller for search and track
   x"1000",
   x"1002",
   x"1003"   
);

attribute rom_extract : string;
attribute rom_style : string;
attribute rom_extract of CONF_AD9739 : signal is "yes";
attribute rom_style of CONF_AD9739 : signal is "DISTRIBUTED";

constant C_AD9739_CODE     : std_logic_vector(7 downto 0) := X"0C"; 
constant C_MAJOR           : integer := 1;
constant C_MINOR           : integer := 1;

end PKG_SPI_CONF_AD9739;

Hi Saberbf,

Priyanka,

Would you please let me know the DAC clock frequency and output signal tone that you are using?

ps: our main goal of EngineerZone is to keep questions and answers clear and open  to public. The programming code that you've forwarded has register level information that might be hard for people to interpret. So please instead of copying and pasting the code, tell us what are your DAC configuration, in plain text. It has to involve all the clock and data rates and frequency of operations.