AD9777: FAQ

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  • AD9777 / AD9779: The two channel DACs, can they be used separately?

    Question I have two independent real data (for example from two different DUC) to I input port and Q input port respectively of AD9779. The modulation is disabled, I only use two internal DACs to output…
  • AD9777 max speed and timing query (SR#: 1200982)

    Q using AD9777 in 2 port mode on 120 MHz. Data and clock is fed by a FPGA to the DAC. According to the datasheet this should be possible to use 120MHz both with pll enable and disable (read from table…
  • AD9777: DATACLK can only be output pin

    Question I found the below description in the datasheet as is shown in attached file. But I can not find any detailed description on the address 02h, Bit 3. I have no idea how to set the bit as either…
  • AD9777: Modulating the bandwidth

    Question I would like to know if is it possible to use AD9777's Direct-IF option so that DAC signal output would be 100-120 MHz (communication signal bandwidth)? This would be achieved by upconverting…
  • What is the latency of the AD9777,5,3 DAC family?

    What is the latency of AD9777,AD9775 and AD9773 16,14 and 12 bit DACs? The answer is shown in the table below. AD977X Latency Table Interpolation Rate Modulation Rate Stage 1 Latency…

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