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AD9102 output going to midrange after pattern period executed
Not Answered
1 day ago
AD 9174 Question about JESD204B Operating Modes
Not Answered
23 hours ago
AD9174 computer operation
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6 hours ago
AD9144 max. analog output bandwidth
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1 day ago
Need to generate a differential clock with 24Mhz, positive and negative.
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1 day ago
AD9164 reverse RF input tolerance
Not Answered
2 days ago
Urgent question AD9739 initialization issue
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3 days ago
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AD9102 output going to midrange after pattern period executed
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17
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1
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on 12 Dec 2019
by
atz
Not Answered
AD 9174 Question about JESD204B Operating Modes
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20
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1
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on 12 Dec 2019
by
digime
Not Answered
AD9174 computer operation
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11
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0
replies
on 12 Dec 2019
by
digime
Not Answered
AD9144 max. analog output bandwidth
0
7
views
0
replies
on 11 Dec 2019
by
Tobias Batt
Not Answered
Need to generate a differential clock with 24Mhz, positive and negative.
0
13
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0
replies
on 11 Dec 2019
by
flint
Suggested Answer
Unable to get HMC7044 PLL lock, AD9172 DAC, JESD PLL locks
0
340
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4
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on 11 Dec 2019
by
testeq02
Not Answered
AD9164 reverse RF input tolerance
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7
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0
replies
on 10 Dec 2019
by
younghosuh
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Urgent question AD9739 initialization issue
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8
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0
replies
on 9 Dec 2019
by
NKokubo131
Not Answered
The sysref of the ad9162-fmc-ebz test board has been a high problem
0
15
views
0
replies
on 5 Dec 2019
by
yueyin
Answered
limited data length with AD9162
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62
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3
replies
on 4 Dec 2019
by
deljones
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Answered Questions
Answered
limited data length with AD9162
0
62
views
3
replies
on 4 Dec 2019
by
deljones
Answered
The error of EVAL-AD916X board in schematic
+1
1651
views
2
replies
on 30 Nov 2019
by
jack89
Answered
AD9783 Thermal Problem
+1
71
views
2
replies
on 23 Nov 2019
by
Vishnu
Answered
Interfacing to the AD9176 Evaluation Board
+1
174
views
17
replies
on 22 Nov 2019
by
Ricman17
Answered
AD9176 and Xilinx VCU108 Integration
+1
170
views
1
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on 21 Nov 2019
by
deljones
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