High-Speed DACs

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Recent Content Q&A

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AD9744 output bias voltage 0

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1 reply

on 17 Nov 2018 by xzsawq21
Not Answered

BPSK for AD9152 0

5 views

0 replies

on 17 Nov 2018 by AndreyGleban
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AD9161 SYSREF_PHASEx 0

48 views

4 replies

on 16 Nov 2018 by baggio
Not Answered

Registers to set dBFS level. 0

12 views

2 replies
on 16 Nov 2018
by saberbf
Not Answered

AD9116 DCLKIO CLKIN shared data bus and simultaneous synced output 0

46 views

1 reply
on 15 Nov 2018
by William.Yang
Not Answered

AD9102 DAC Constant, Gain, Offset 0

46 views

5 replies
on 15 Nov 2018
by William.Yang
Not Answered

Deterministic Latency in the data phase 0

16 views

2 replies

on 14 Nov 2018 by mikec
Answered

Solder paste stencil and via tenting for optimal reflow of the AD9122 72-lead LFCSP (referencing EVAL-AD9122 and AN-772) +1

42 views

2 replies
on 13 Nov 2018
by deljones
Not Answered

Inconsistency in datasheet rev C 0

10 views

0 replies

on 13 Nov 2018 by OlivierBo
Answered

ACE trouble recognizing 2 AD9162 eval cards 0

25 views

1 reply
on 13 Nov 2018
by saberbf

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Answered Questions

Answered

Solder paste stencil and via tenting for optimal reflow of the AD9122 72-lead LFCSP (referencing EVAL-AD9122 and AN-772) +1

42 views

2 replies
on 13 Nov 2018
by deljones
Answered

ACE trouble recognizing 2 AD9162 eval cards 0

25 views

1 reply
on 13 Nov 2018
by saberbf
Answered

Does the AD9172 is a offset binary DAC? +1

40 views

1 reply
on 5 Nov 2018
by MicheleV
Answered

AD9164 STPL sample order +1

78 views

2 replies
on 29 Oct 2018
by saberbf
Answered

ADS8-V1 vs ADS7-V2 for AD9164 +1

96 views

2 replies
on 29 Oct 2018
by saberbf

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