High-Speed DACs

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Recent Content Q&A

Not Answered

AD9117 Data Control Register setting 0

22 views

1 reply
on 22 Mar 2019
by William.Yang
Not Answered

Does AD9173 can load FTW by external SYSREF signal? 0

20 views

1 reply
on 22 Mar 2019
by deljones
Not Answered

AD9152 SYNCOUT 0

18 views

1 reply
on 22 Mar 2019
by deljones
Not Answered

How to deal with the image in 3rd Nyquist zone of AD9164 at mix mode 0

17 views

0 replies

on 22 Mar 2019 by Tiande
Not Answered

What is "N2[1:0] PLL control clock divider" in AD9146? 0

12 views

0 replies

on 21 Mar 2019 by Sergo_R
Not Answered

AD9375 AGC 0

12 views

0 replies

on 21 Mar 2019 by Tomer_P
Not Answered

AD9375 - example code 0

12 views

0 replies

on 21 Mar 2019 by Tomer_P
Not Answered

about the input clk of AD9748 0

10 views

0 replies

on 21 Mar 2019 by liyinglan
Answered

cannot communicate with AD9106-EBZ eval board +1

87 views

6 replies
on 20 Mar 2019
by William.Yang
Not Answered

Big variations in POR to POR delay AD9164 0

136 views

6 replies

on 20 Mar 2019 by MattDC

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Answered Questions

Answered

cannot communicate with AD9106-EBZ eval board +1

87 views

6 replies
on 20 Mar 2019
by William.Yang
Answered

AD9172 IBIS Pin Model +1

88 views

1 reply
on 18 Mar 2019
by deljones
Answered

the schemaic design of AD9747? +1

51 views

1 reply
on 15 Mar 2019
by deljones
Answered

AD9142A FPGA Clock Issue +1

129 views

3 replies
on 15 Mar 2019
by deljones
Answered

How to configure 4x interpolation mode in AD9144? +1

74 views

1 reply
on 15 Mar 2019
by deljones

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