groupUrl: https://ez.analog.com/data_converters/high-speed_adcs/
Analog.com Analog Dialogue Wiki English
Analog.com Analog Dialogue Wiki 简体中文
EngineerZone
EngineerZone
  • Site
  • User
  • Site
  • Search
  • User
EngineerZone
EngineerZone
  • Log in
  • Site
  • Search
  • Log in
  • Home
  • Blogs ⌵
  • Browse ⌵
    • All Groups
    • All Members
  • Support ⌵
    • 3D ToF Depth Sensing
    • A2B
    • Aerospace and Defense (ADEF)
    • Amplifiers
    • Analog Microcontrollers
    • Analysis Control Evaluation (ACE) Software
    • Audio
    • Clock and Timing
    • Condition-Based Monitoring
    • Data Converters
    • Design Tools and Calculators
    • Direct Digital Synthesis (DDS)
    • Embedded Vision Sensing
    • Energy Monitoring and Metering
    • FPGA Reference Designs
    • Industrial Ethernet
    • Interface and Isolation
    • Low Power RF Transceivers
    • MEMS Inertial Sensors
    • Motor Control Hardware Platforms
    • Optical Sensing
    • Power Management
    • Precision Technology Signal Chains
    • Processors and DSP
    • Reference Circuits
    • RF and Microwave
    • Signal Chain Power (SCP)
    • Switches/Multiplexers
    • Temperature Sensors
    • Video
    • Wide Band RF Transceivers
    • Wireless Sensor Networks Reference Library
  • About EZ
  • More
  • Cancel
  • 主页
  • 浏览 ⌵
    • 收件箱
    • 个人设置
    • 会员
    • 专区列表
  • 论坛专区 ⌵
    • 放大器专区
    • 精密转换器专区
    • 音频专区
    • ADE电能计量专区
    • MEMS和传感器专区
    • 接口和隔离专区
    • Power 中文专区
    • ADUC微处理器专区
    • 锁相环专区
    • 开关和多路复用器专区
    • 温度传感器
    • 基准电压源专区
    • 资源库
    • 论坛使用指南
    • 技术支持参考库
    • 在线研讨会
    • 论坛社群活动
    • 论坛激励活动
  • More
  • Cancel
High-Speed ADCs
  • Data Converters
High-Speed ADCs
Documents Operating AD6676 at  Fadc of 3.26GHz or higher when max allowed specification is 3.2 GHz.
  • Q&A
  • Discussions
  • Documents
  • File Uploads
  • Tags
  • Managers
  • More
  • Cancel
  • New
High-Speed ADCs requires membership for participation - click to join
  • HIGH-SPEED ADC SUPPORT COMMUNITY
  • TAGS LIST: High-Speed ADCs
  • +Absolute Group Delay: FAQ
  • +AD6620: FAQ
  • +AD6624A: FAQ
  • +AD6633: FAQ
  • +AD6635: FAQ
  • +AD6636: FAQ
  • +AD6640: FAQ
  • +AD6640AST: FAQ
  • +AD6643: FAQ
  • +AD6644: FAQ
  • +AD6645: FAQ
  • +AD664: FAQ
  • +AD6650: FAQ
  • +AD6654: FAQ
  • +AD6655: FAQ
  • +AD6657: FAQ
  • -AD6676: FAQ
    • I noticed that it is possible to further reduce the full-scale input power requirements to the AD6676.  Is there any trade-offs that I need to be aware of when considering this option?
    • Operating AD6676 at  Fadc of 3.26GHz or higher when max allowed specification is 3.2 GHz.
    • What determines the AD6676’s full-scale input setting?
    • What is the STF response of a Σ-Δ ADC and why does it matter?
    • AD6676 FAQ: Can you explain what the “Profile feature” is and why I it may be advantageous to use in some applications?
    • AD6676 FAQ: What development tools are available?
    • AD6676 FAQ: What is the difference between a typical IF-sampling ADC and the AD6676 and why is called a Wideband IF Receiver Subsystem?
    • AD6676 FAQ: Why are the performance specifications of the AD6676 different than the ones used to specify a typical ADC?
    • AD6676 FAQ: Why is the AD6676’s IF input resistance 60 ohms vs 50, 100 or even 200 ohms?
    • AD6676 FAQ: Why isn't the noise floor of the AD6676 flat?
    • AD6676 FAQ:I heard that Σ-Δ ADC’s can be driven into overload resulting in unstable behavior.  Is this true and should I be concerned?
  • +AD9027: FAQ
  • +AD9042: FAQ
  • +AD9050: FAQ
  • +AD9054A: FAQ
  • +AD9057: FAQ
  • +AD9066: FAQ
  • +AD9200: FAQ
  • +AD9201: FAQ
  • +AD9211: FAQ
  • +AD9212: FAQ
  • +AD9215: FAQ
  • +AD9218: FAQ
  • +AD9220: FAQ
  • +AD9222: FAQ
  • +AD9224: FAQ
  • +AD9225: FAQ
  • +AD9228: FAQ
  • +AD9229: FAQ
  • +AD9230: FAQ
  • +AD9231: FAQ
  • +AD9233: FAQ
  • +AD9236: FAQ
  • +AD9238: FAQ
  • +AD9239: FAQ
  • +AD9240: FAQ
  • +AD9243: FAQ
  • +AD9244: FAQ
  • +AD9245: FAQ
  • +AD9246: FAQ
  • +AD9248: FAQ
  • +AD9249: FAQ
  • +AD9250: FAQ
  • +AD9253: FAQ
  • +AD9254: FAQ
  • +AD9255: FAQ
  • +AD9257: FAQ
  • +AD9261: FAQ
  • +AD9262: FAQ
  • +AD9265: FAQ
  • +AD9268: FAQ
  • +AD9266: FAQ
  • +AD9269: FAQ
  • +AD9271: FAQ
  • +AD9272: FAQ
  • +AD9277: FAQ
  • +AD9279: FAQ
  • +AD9280: FAQ
  • +AD9283: FAQ
  • +AD9284: FAQ
  • +AD9286: FAQ
  • +AD9288: FAQ
  • +AD922X: FAQ
  • +AD9410: FAQ
  • +AD9430: FAQ
  • +AD9432: FAQ
  • +AD9433: FAQ
  • +AD9434: FAQ
  • +AD9444: FAQ
  • +AD9446: FAQ
  • +AD9460: FAQ
  • +AD9461: FAQ
  • +AD9467: FAQ
  • +AD9481: FAQ
  • +AD9484: FAQ
  • +AD9520: FAQ
  • +AD9560: FAQ
  • +AD9600: FAQ
  • +AD9613: FAQ
  • +AD9625: FAQ
  • +AD9626: FAQ
  • +AD9627: FAQ
  • +AD9631: FAQ
  • +AD9640: FAQ
  • +AD9643: FAQ
  • +AD9644: FAQ
  • +AD9645: FAQ
  • +AD9649: FAQ
  • +AD9652: FAQ
  • +AD9680: FAQ
  • +AD9683: FAQ
  • +AD9684: FAQ
  • +AD9695: FAQ
  • +AD9814: FAQ
  • +AD9822: FAQ
  • +AD9826: FAQ
  • +AD9864: FAQ
  • +AD9874: FAQ
  • +AD96685: FAQ
  • +High Speed ADC: FAQ
  • +High Speed Capture Data: FAQ
  • +HSC-ADC-EVALCZ: FAQ
  • +JESD204B: FAQ

Operating AD6676 at  Fadc of 3.26GHz or higher when max allowed specification is 3.2 GHz.

Q 

We like to use your new if-wideband-rx-subsystem AD6676 for our new
tuner generation and I have two question regarding this device:

Our system data rate is 101.875MHz and we like to use the internal
synthesizer and the output decimation filter. If we use the 32
decimation the fadc and fsynthesizer will be 3.26GHz and this is out of
the specification in your datasheet. (fadc and fsynth max. 3.2GHz) We
tested this setting with your eval kit and it seems to work. So how
critical is this 60MHz higher frequency for your device?


We bought the evaluation kit with the HSC-ADC-EVALEZ and we like to save
the captured data for further (our own) analyses in Matlab. Your Matlab
based tool can configure the device and plot the spectrum, IQ-diagram
etc. Is there a possibility to save the captured data in a file? Or can
you provide us the matlab sources from your tool?

 

A 

According to PL, the customer could discover that they can operate the AD6676
and  its CLK SYN up to 4 GHz on the EVB so there is a lot of margin to
accommodate customer's desire to operate at 3.26 GHz.  This is because we
originally designed the ADC core (and CLK SYN) to operate up to 4 GHz clock
rate.However, a max ADC core clock rate has been specified with an upper limit
of 3.2 GHz to ensure that characterization specifications are met over all PVT
(Process, Supply voltage, Temp variations ). This is not guaranteed at ~4GHz.  
According to the PL, they do not see an issue operating it at 3.26 GHz but ADI
cannot guarantee because it is out of specification.

If you are using MATLAB based AD6676 ADC  Analyzer tool,  the 'Save Data'
option under 'Data Display Windows'  in Direct
output mode data window stores the data by default in
'\Results\FFTdata\DataStamp' folder (Section : Data Display Windows (Figure 22)
in Link1).

If you are using VisualAnalog, (AN-905),  AD6676 Samples Canvas -> Graph ->Save
As ->allows you to choose from the currently plotted analysis data and save to
a comma-separated values (.csv) file which can be exported in external
platforms such as MATLAB for further analysis. For capturing data related to
FFT analysis you can choose the respective FFT canvas to store the analysis
data in a similar manner.

References:
VisualAnalogTm Converter Evaluation Tool User Manual Application Note AN-905
http://www.analog.com/media/en/technical-documentation/application-notes/AN-905.pdf 

  • ad6676
  • visualanalog
  • Share
  • History
  • More
  • Cancel
Comments
Anonymous
Related
 
社交网络
快速链接
  • 关于ADI
  • Partners
  • 模拟对话
  • 职业
  • 联系我们
  • 投资信息
  • 新闻中心
  • 质量和可靠性
  • 办事处与代理商
  • Analog Garage
语言
  • English
  • 简体中文
  • 日本語
  • Руccкий
电子快讯

欲获得最新ADI产品、设计工具、培训与活动的相关新闻与文章,请从我们的在线快讯中选出您感兴趣的产品类别,每月或每季度都会发送至您的收件箱。

订阅
Switch to mobile view
Analog Logo
© 1995 - 2022 Analog Devices, Inc. All Rights Reserved 沪ICP备09046653号-1
  • ©
  • 1995 - 2022 Analog Devices, Inc. All Rights Reserved
  • 沪ICP备09046653号-1
  • 网站地图
  • 隐私和保密政策
  • 隐私设置
  • 使用条款
 
Social
Quick Links
  • About ADI
  • Partners
  • Analog Dialogue
  • Careers
  • Contact us
  • Investor Relations
  • News Room
  • Quality & Reliability
  • Sales & Distribution
  • Analog Garage
Languages
  • English
  • 简体中文
  • 日本語
  • Руccкий
Newsletters

Interested in the latest news and articles about ADI products, design tools, training and events? Choose from one of our 12 newsletters that match your product area of interest, delivered monthly or quarterly to your inbox.

Sign Up
Switch to mobile view
Analog Logo
© 1995 - 2022 Analog Devices, Inc. All Rights Reserved 沪ICP备09046653号-1
  • ©
  • 1995 - 2022 Analog Devices, Inc. All Rights Reserved
  • 沪ICP备09046653号-1
  • Sitemap
  • Privacy & Security
  • Privacy Settings
  • Terms of use
EngineerZone Uses cookies to ensure you get the best experience in our community. For more information on cookies, please read our Privacy & Security Statement.