reduce the power consumption during idle periods when conversion is not
Would stopping the input clock signal have a significant effect? What sort of
current consumption could we hope for in in this “idle” mode?
With the clock stopped and a 1V reference the AD9225 will draw 190mw. With a
2V reference it will draw 250mw.
If the clock is stopped for more than a milli-second.... at least 10 clock
cycles will be required before valid data is available.