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Documents AD9249: Output driver termination and drive strength
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    • Are there considerations on utilizing the maximum power-down mode of the AD9249?
    • Does the AD9249 have built-in test modes?
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    • AD9249: Output driver termination and drive strength
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AD9249: Output driver termination and drive strength

Q 

The AD9249 register 0x15 bits 5:4 sets the output driver termination to 0, 200
or 100 ohms. What is this termination eg series resistor in each driver of the
LVDS pair of drivers, or parallel resistor across the LVDS pair of drivers?
Page 22 of datasheet says "Additional SPI options allow the user to further
increase the internal termination (increasing the current) of all 16 outputs to
drive longer trace lengths, which can be achieved by programming Register
0x15". If this is series termination I'm puzzled that increasing the
termination increases the current, therefore does this mean that it is parallel
termination across the two drivers and the drive current is also increased to
drive this termination?
 

 

A 

AD9249 Register 0x15 Bits[5:4] optionally adds an internal shunt termination.
The default is no internal termination (Register 0x15 Bits[5:4] = 00). In the
typical case where an external 100Ohm shunt termination is placed very close to
the receiver, or as in the case of many FPGAs where the termination is internal
to the receiver, this internal termination feature should not be needed.

LVDS requires a 100Ohm shunt termination. If, for some reason, the termination
at the receiver (i.e. FPGA) is not optimal, invoking the optional termination
feature at the ADC could be helpful in reducing round trip reflections. If for
some reason there is no termination at the receiver, the internal termination
provides a load for the LVDS drivers (current sources) to generate a voltage.

You are correct about the drive strength. Because the additional output
termination will add loading to the driver, the drive strength is increased
when using this option.

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