Is it possible to run the AD9255 with a sample rate lower than 10MSPS?
The issue is that the AD9255 uses a “booster” circuit to generate a higher
voltage for some internal circuitry and at some lower clocking rate it may fail
to function properly.
Consider the following:
1)See if it is possible to still operate the ADC at 10 MSPS and perhaps
decimate-by-2 on the digital side. For example, if the board uses an FPGA to
capture data, perhaps you can modify code slightly so that you take every
other sample (hence 5 MSPS data rate but ADC operates at 10 MSPS).
2)If this is not possible, you could try operating the board at a lower rate
and see if it meets your performance requirements. Note, the min limit of 10
MSPS is conservative since it accounts for worse case operating conditions.
Perhaps if you tests your boards at 1 MSPS operation and still get reasonable
results, you could operate at 5 MSPS giving you some margin for
temp/supply variation once board is in the field. NOTE: The customer still
responsibility if they choose to operate beyond our datasheet limits.