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  • HIGH-SPEED ADC SUPPORT COMMUNITY
  • TAGS LIST: High-Speed ADCs
  • +Absolute Group Delay: FAQ
  • +AD6620: FAQ
  • +AD6624A: FAQ
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  • AD922X: FAQ
  • +AD9410: FAQ
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  • +AD9460: FAQ
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  • -AD9467: FAQ
    • Is the AD9467's register 107h address correct?
    • Thermal Information
    • Why is the AD9467-FMC-250EBZ missing the on-board oscillator Y200?
    • AD9467 Exposed Paddle
    • AD9467-200: EBZ to Xilinx 1
    • AD9467-FMC-250EBZ
    • AD9467: SPI 2.5V logic
    • AD9467_PN pattern-1
  • +AD9481: FAQ
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  • +AD9640: FAQ
  • +AD9643: FAQ
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  • +AD9649: FAQ
  • +AD9652: FAQ
  • +AD9680: FAQ
  • +AD9683: FAQ
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  • +High Speed ADC: FAQ
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  • +HSC-ADC-EVALCZ: FAQ
  • +JESD204B: FAQ
  • +AD10200: FAQ
  • +AD10465: FAQ
  • +AD608: FAQ
  • +AD7720: FAQ
  • +AD8283: FAQ
  • +AD9211-300EBZ: FAQ
  • +AD9215BCPZ-105: FAQ
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  • +AD9257S: FAQ
  • +AD9629: FAQ
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  • +HMCAD1520: FAQ
  • +MAX11835EWA+_B1: FAQ
  • +MAX11855: FAQ
  • +MAX1421ECM+: FAQ
  • +MAX1437BETK+_T1: FAQ
  • +MAX1448: FAQ
  • +MAX19515: FAQ
  • +MAX19516: FAQ
  • +MAX19516ETM+: FAQ
  • +MAX19517EVKIT+: FAQ

AD9467 Exposed Paddle

Q 

The Gerber files for the AD9467 show that solder paste is
deposited only on the center square of the exposed paddle PCB layout.

 

A 

This is just a recommendation so that there is uniform solder flow under the
chip so there aren’t any “islands” that form when the chip is mounted on the
board.

The partitioning can be done by using a solder mask layer. Figure 69 in the
datasheet actually
shows an extreme case, but even if the area was partitioned into 4 areas, it
would still be better than having one big exposed paddle.

Tags: ad9467
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