Locale Icon
English
  • Forums

    Popular Forums

    • LTspice
    • RF and Microwave
    • Video
    • Power Management
    • Precision ADCs
    • FPGA Reference Designs
    • Linux Software Drivers

    Product Forums

    • Amplifiers
    • Microcontrollers
    • Clock and Timing
    • Data Converters
    • Direct Digital Synthesis (DDS)
    • Energy Monitoring and Metering
    • Interface and Isolation
    • MEMS Inertial Sensors
    • Power Management
    • Processors and DSP
    • Switches/Multiplexers
    • Temperature Sensors
    • Voltage References
    View All

    Application Forums

    • A2B
    • Audio
    • Automated Test Equipment (ATE)
    • Condition-Based Monitoring
    • Depth, Perception & Ranging Technologies
    • Embedded Vision Sensing Library
    • Motor Control Hardware Platforms
    • Precision Technology Signal Chains Library
    • Video
    • Wireless Sensor Networks Reference Library

    Design Center Forums

    • ACE Evaluation Software
    • ADEF System Platforms
    • Design Tools and Calculators
    • FPGA Reference Designs
    • Linux Software Drivers
    • Microcontroller no-OS Drivers
    • Power Studio Designer
    • Power Studio Planner
    • Reference Designs
    • Robot Operating System (ROS) SDK
    • Signal Chain Power (SCP)
    • Software Interface Tools
    • System Demonstration Platform (SDP) Support
  • Learn

    Highlighted Webinar

    Designing for Silence: EMC Testing and Reduction for Digital Isolators and DC-DC Converters

    Join us for an in-depth webinar where we dive into the world of EMC testing applied to ADI’s digital isolators. We''ll walk through the test setups, standards...

    Places

    • ADI Academy
    • ADI Webinars
    • Video Annex
    • Virtual Classroom

    Libraries

    • 3D ToF Depth Sensing Library
    • Continuous-Wave CMOS Time of Flight (TOF) Library
    • Embedded Vision Sensing Library
    • Gigabit Multimedia Serial Link (GMSL) Library
    • Optical Sensing Library
    • Precision Technology Signal Chains Library
    • Software Modules and SDKs Library
    • Supervisory Circuits Library
    • Wireless Sensor Networks Library

    Latest Webinars

    • Power Management Fundamentals II Session 6: Key Layout Considerations for Power
    • Power Management Fundamentals II Session 5: Deeper Look into Power Protection
    • Power Management Fundamentals II Session 4: Isolated Converters Explained
    • Designing for Silence: EMC Testing and Reduction for Digital Isolators and DC-DC Converters
    • Maximize Workflow: Analog Devices eShop New Upload Tools
    View All Webinars
  • Community Hub

    Challenge Yourself!

      KCC's Quizzes AQQ294 about a digital phase splitter design

      1. Quote of the month: "I've learned that people will forget what you said, people will forget what you did, but people will never forget how you made...

    View All

    What's Brewing

      Read a Blog, Take this Quiz for Another Chance to Win a Gift Card!

      Important: Read the blog first . The quiz questions are all based on the content from the blog: Let's Take a Field-Bus Trip Your field-bus engines...

    View All

    Places

    • Community Help
    • Logic Lounge
    • Super User Program
    • Analog Dialogue Quiz

    Resources

    • EZ Code of Conduct
    • EZ How To Help Articles
    • Getting Started Guide
    • ADI: Words Matter
    • Community Help Videos
    View All
  • Blogs

    Highlighted Blogs

    Turning up the Noise: .NOISE Simulations in LTspice: Part 1 of 3

    Noise simulations are a crucial aspect of circuit design, allowing engineers to understand and mitigate the impact of noise on their circuits. There are...

     

    The ABCs of SerDes

    SerDes has revolutionized how we transport data at gigabit speeds with low pin count and has become the backbone of modern-day communication. GMSL is ADI...

    Latest Blogs

    • A Designer’s Guide to Isolated Transceiver Architectures
    • Understanding Safe Failure Fraction: Can There Be Multiple Values?
    • Powering the Future: Multiphase Buck-Boost Innovation for Telecom: Part 3 of 3
    • Freedom from Interference: Control of Mixed ASIL Criticalities
    • High-Tech Pro and Crafty Creator: Meet Iulia, Our Inspiring Super User!
    Read All Blogs

    ADI Blogs

    • EZ Spotlight
    • The Engineering Mind
  • ContentZone

    Visit ContentZone

    ContentZone

    Technical articles. Blogs. Videos. Your ADI content, all in one place.

    View ContentZone

    Featured Content

    Featured Content Title

    Blurb About Content

    View Content By Industry

    • Aerospace and Defense Systems
    • Automotive Solutions
    • Consumer Technology Solutions
    • Data Center Solutions
    • Energy Solutions
    • Healthcare Solutions
    • Industrial Automation Technology Solutions
    • Instrumentation and Measurement Solutions
    • Intelligent Building Solutions
    • Wireless Communication Solutions

    View Content By Technology

    • A2B Audio Bus
    • ADI OtoSense Predictive Maintenance Solutions
    • Dynamic Speaker Management
    • Gallium Nitride (GaN) Technology
    • Gigabit Multimedia Serial Link (GMSL)
    • Industrial Vision
    • Power Solutions
    • Precision Technology
    • RF
    • Sensor Interfaces
    • SmartMesh
EngineerZone
EngineerZone
High-Speed ADCs
  • Log In
  • User
  • Site
  • Search
OR
Ask a Question
High-Speed ADCs
  • Data Converters
High-Speed ADCs
Documents Operating AD6676 at Fadc of 3.26GHz or higher when max allowed specification is 3.2 GHz.
  • Forums
  • File Uploads
  • FAQs/Docs
  • Members
  • Tags
  • Cancel
  • HIGH-SPEED ADC SUPPORT COMMUNITY
  • TAGS LIST: High-Speed ADCs
  • +Absolute Group Delay: FAQ
  • +AD6620: FAQ
  • +AD6624A: FAQ
  • +AD6633: FAQ
  • +AD6635: FAQ
  • +AD6636: FAQ
  • AD6640: FAQ
  • +AD6640AST: FAQ
  • +AD6643: FAQ
  • +AD6644: FAQ
  • +AD6645: FAQ
  • +AD664: FAQ
  • +AD6650: FAQ
  • +AD6654: FAQ
  • +AD6655: FAQ
  • +AD6657: FAQ
  • -AD6676: FAQ
    • I noticed that it is possible to further reduce the full-scale input power requirements to the AD6676.  Is there any trade-offs that I need to be aware of when considering this option?
    • Operating AD6676 at  Fadc of 3.26GHz or higher when max allowed specification is 3.2 GHz.
    • What determines the AD6676’s full-scale input setting?
    • What is the STF response of a Σ-Δ ADC and why does it matter?
    • AD6676 Can you explain what the “Profile feature” is and why I it may be advantageous to use in some applications?
    • AD6676 What development tools are available?
    • AD6676 What is the difference between a typical IF-sampling ADC and the AD6676 and why is called a Wideband IF Receiver Subsystem?
    • AD6676 Why are the performance specifications of the AD6676 different than the ones used to specify a typical ADC?
    • AD6676 Why is the AD6676’s IF input resistance 60 ohms vs 50, 100 or even 200 ohms?
    • AD6676 Why isn't the noise floor of the AD6676 flat?
    • AD6676 I heard that Σ-Δ ADC’s can be driven into overload resulting in unstable behavior.  Is this true and should I be concerned?
    • Operating AD6676 at Fadc of 3.26GHz or higher when max allowed specification is 3.2 GHz.
  • +AD9027: FAQ
  • +AD9042: FAQ
  • +AD9050: FAQ
  • +AD9054A: FAQ
  • +AD9057: FAQ
  • +AD9066: FAQ
  • +AD9200: FAQ
  • +AD9201: FAQ
  • +AD9211: FAQ
  • +AD9212: FAQ
  • +AD9215: FAQ
  • +AD9218: FAQ
  • +AD9220: FAQ
  • +AD9222: FAQ
  • +AD9224: FAQ
  • +AD9225: FAQ
  • +AD9228: FAQ
  • +AD9229: FAQ
  • +AD9230: FAQ
  • +AD9231: FAQ
  • +AD9233: FAQ
  • +AD9236: FAQ
  • +AD9238: FAQ
  • +AD9239: FAQ
  • +AD9240: FAQ
  • +AD9243: FAQ
  • +AD9244: FAQ
  • +AD9245: FAQ
  • +AD9246: FAQ
  • +AD9248: FAQ
  • +AD9249: FAQ
  • +AD9250: FAQ
  • +AD9253: FAQ
  • +AD9254: FAQ
  • +AD9255: FAQ
  • +AD9257: FAQ
  • +AD9261: FAQ
  • +AD9262: FAQ
  • +AD9265: FAQ
  • +AD9268: FAQ
  • +AD9266: FAQ
  • +AD9269: FAQ
  • +AD9271: FAQ
  • AD9272: FAQ
  • +AD9277: FAQ
  • +AD9279: FAQ
  • +AD9280: FAQ
  • +AD9283: FAQ
  • +AD9284: FAQ
  • +AD9286: FAQ
  • +AD9288: FAQ
  • AD922X: FAQ
  • +AD9410: FAQ
  • +AD9430: FAQ
  • +AD9432: FAQ
  • +AD9433: FAQ
  • +AD9434: FAQ
  • +AD9444: FAQ
  • +AD9446: FAQ
  • +AD9460: FAQ
  • +AD9461: FAQ
  • +AD9467: FAQ
  • +AD9481: FAQ
  • +AD9484: FAQ
  • AD9520: FAQ
  • +AD9560: FAQ
  • +AD9600: FAQ
  • +AD9613: FAQ
  • +AD9625: FAQ
  • +AD9626: FAQ
  • +AD9627: FAQ
  • +AD9631: FAQ
  • +AD9640: FAQ
  • +AD9643: FAQ
  • +AD9644: FAQ
  • +AD9645: FAQ
  • +AD9649: FAQ
  • +AD9652: FAQ
  • +AD9680: FAQ
  • +AD9683: FAQ
  • +AD9684: FAQ
  • +AD9695: FAQ
  • +AD9814: FAQ
  • +AD9822: FAQ
  • +AD9826: FAQ
  • +AD9864: FAQ
  • +AD9874: FAQ
  • +AD96685: FAQ
  • +High Speed ADC: FAQ
  • +High Speed Capture Data: FAQ
  • +HSC-ADC-EVALCZ: FAQ
  • +JESD204B: FAQ
  • +AD10200: FAQ
  • +AD10465: FAQ
  • +AD608: FAQ
  • +AD7720: FAQ
  • +AD8283: FAQ
  • +AD9211-300EBZ: FAQ
  • +AD9215BCPZ-105: FAQ
  • +AD9216: FAQ
  • +AD9257S: FAQ
  • +AD9629: FAQ
  • +AD9635: FAQ
  • +AD9637: FAQ
  • +HMCAD1520: FAQ
  • +MAX11835EWA+_B1: FAQ
  • +MAX11855: FAQ
  • +MAX1421ECM+: FAQ
  • +MAX1437BETK+_T1: FAQ
  • +MAX1448: FAQ
  • +MAX19515: FAQ
  • +MAX19516: FAQ
  • +MAX19516ETM+: FAQ
  • +MAX19517EVKIT+: FAQ

Operating AD6676 at Fadc of 3.26GHz or higher when max allowed specification is 3.2 GHz.

Question

We like to use your new if-wideband-rx-subsystem AD6676 for our new
tuner generation and I have two question regarding this device:

Our system data rate is 101.875MHz and we like to use the internal
synthesizer and the output decimation filter. If we use the 32
decimation the fadc and fsynthesizer will be 3.26GHz and this is out of
the specification in your datasheet. (fadc and fsynth max. 3.2GHz) We
tested this setting with your eval kit and it seems to work. So how
critical is this 60MHz higher frequency for your device?


We bought the evaluation kit with the HSC-ADC-EVALEZ and we like to save
the captured data for further (our own) analyses in Matlab. Your Matlab
based tool can configure the device and plot the spectrum, IQ-diagram
etc. Is there a possibility to save the captured data in a file? Or can
you provide us the matlab sources from your tool?

Answer

According to PL, the customer could discover that they can operate the AD6676
and its CLK SYN up to 4 GHz on the EVB so there is a lot of margin to
accommodate customer's desire to operate at 3.26 GHz. This is because we
originally designed the ADC core (and CLK SYN) to operate up to 4 GHz clock
rate.However, a max ADC core clock rate has been specified with an upper limit
of 3.2 GHz to ensure that characterization specifications are met over all PVT
(Process, Supply voltage, Temp variations ). This is not guaranteed at ~4GHz.
According to the PL, they do not see an issue operating it at 3.26 GHz but ADI
cannot guarantee because it is out of specification.

If you are using MATLAB based AD6676 ADC Analyzer tool, the 'Save Data'
option under 'Data Display Windows' in Direct
output mode data window stores the data by default in
'\Results\FFTdata\DataStamp' folder (Section : Data Display Windows (Figure 22)
in Link1).

If you are using VisualAnalog, (AN-905), AD6676 Samples Canvas -> Graph ->Save
As ->allows you to choose from the currently plotted analysis data and save to
a comma-separated values (.csv) file which can be exported in external
platforms such as MATLAB for further analysis. For capturing data related to
FFT analysis you can choose the respective FFT canvas to store the analysis
data in a similar manner.

References
Link1 : AD6676 EVB Platform User's Guide in
ftp://ftp.analog.com/pub/HSC_ADC_Apps/AD6676_Demo_Package/AN-905 : VisualAnalog
Converter Evaluation Tool Application Note.


Tags: 5CPN0843 ad6676 high-speed adcs
  • Share
  • History
  • Cancel
analog-devices logo

About Analog Devices

  • Who We Are
  • Careers
  • Newsroom
  • What We Do (Signals+)
  • Investor RelationsExternalLink
  • Quality & Reliability
  • Sales and Distribution
  • What's New on Analog.com
  • Contact Us

Find Help

  • Support
  • Resources
  • WikiExternalLink
  • Analog Dialogue
  • ADI Developer PortalExternalLink

myAnalog

Interested in the latest news and articles about ADI products, design tools, training, and events?

Go to myAnalog
  • Instagram page
  • Twitter page
  • Linkedin page
  • Youtube page
  • Facebook
  • Legal and Risk
  • Accessibility
  • Privacy Policy
  • Privacy Settings
  • Cookie Settings

©2025 Analog Devices, Inc. All Rights Reserved

analog-devices

About Analog Devices

Down Up
  • Who We Are
  • Careers
  • Newsroom
  • What We Do (Signals+)
  • Investor RelationsExternalLink
  • Quality & Reliability
  • Sales and Distribution
  • What's New on Analog.com
  • Contact Us

Find Help

Down Up
  • Support
  • Resources
  • WikiExternalLink
  • Analog Dialogue
  • ADI Developer PortalExternalLink

myAnalog

Interested in the latest news and articles about ADI products, design tools, training, and events?

Go to myAnalog
Instagram page Facebook Twitter page Linkedin page Youtube page
  • Legal and Risk
  • Accessibility
  • Privacy Policy
  • Privacy Settings
  • Cookie Settings

©2025 Analog Devices, Inc. All Rights Reserved